Zero span improvements

This commit is contained in:
Jan Käberich 2022-06-22 23:00:09 +02:00
parent 6393ae7fc3
commit 7151fffcdb
3 changed files with 6 additions and 7 deletions

View File

@ -843,9 +843,8 @@ void VNA::NewDatapoint(Protocol::Datapoint d)
auto vd = VNAData(d); auto vd = VNAData(d);
if(!settings.zerospan) { vd = average.process(vd);
vd = average.process(vd);
}
if(calMeasuring) { if(calMeasuring) {
if(average.currentSweep() == averages) { if(average.currentSweep() == averages) {
// this is the last averaging sweep, use values for calibration // this is the last averaging sweep, use values for calibration

View File

@ -9,7 +9,7 @@ void Delay::Init() {
// enable update interrupt // enable update interrupt
TIM1->DIER |= TIM_DIER_UIE; TIM1->DIER |= TIM_DIER_UIE;
HAL_NVIC_SetPriority(TIM1_UP_TIM16_IRQn, 0, 0); HAL_NVIC_SetPriority(TIM1_UP_TIM16_IRQn, 6, 0);
HAL_NVIC_EnableIRQ(TIM1_UP_TIM16_IRQn); HAL_NVIC_EnableIRQ(TIM1_UP_TIM16_IRQn);
TIM1->CR1 |= TIM_CR1_CEN; TIM1->CR1 |= TIM_CR1_CEN;
@ -36,8 +36,8 @@ void Delay::ms(uint32_t t) {
} }
} }
void Delay::us(uint32_t t) { void Delay::us(uint32_t t) {
uint64_t start = get_us(); uint64_t start = TIM1->CNT;
while(start + t > get_us()); while(TIM1->CNT - start < t);
} }
extern "C" { extern "C" {

View File

@ -61,8 +61,8 @@ static void ReadComplete(const FPGA::SamplingResult &result) {
} }
static void FPGA_Interrupt(void*) { static void FPGA_Interrupt(void*) {
lastISR = Delay::get_us();
FPGA::InitiateSampleRead(ReadComplete); FPGA::InitiateSampleRead(ReadComplete);
lastISR = Delay::get_us();
} }
void HW::Work() { void HW::Work() {