caiyu/LibreVNA
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

detect missing points + minor USB speedup

Browse Source
This commit is contained in:
Jan Käberich 2020-11-24 16:28:57 +01:00
parent 764e8b8692
commit ef97d54913
22 changed files with 577 additions and 1448 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
Software/PC_Application/VNA/vna.cpp
View File

@ -463,6 +463,11 @@ void VNA::NewDatapoint(Protocol::Datapoint d)
UpdateAverageCount(); UpdateAverageCount();
markerModel->updateMarkers(); markerModel->updateMarkers();
} }
static unsigned int lastPoint = 0;
if(d.pointNum > 0 && d.pointNum != lastPoint + 1) {
qWarning() << "Got point" << d.pointNum << "but last received point was" << lastPoint << "("<<(d.pointNum-lastPoint-1)<<"missed points)";
}
lastPoint = d.pointNum;
} }
void VNA::UpdateAverageCount() void VNA::UpdateAverageCount()

1233
Software/VNA_embedded/.cproject
View File

File diff suppressed because it is too large Load Diff

20
Software/VNA_embedded/.mxproject
View File

File diff suppressed because one or more lines are too long

67
Software/VNA_embedded/.settings/language.settings.xml
View File

@ -1,48 +1,25 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?> <?xml version="1.0" encoding="UTF-8" standalone="no"?>
<project> <project>
<configuration id="fr.ac6.managedbuild.config.gnu.cross.exe.debug.1502405410" name="Debug">
<configuration id="fr.ac6.managedbuild.config.gnu.cross.exe.debug.1502405410" name="Debug"> <extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider"> <provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/> <provider class="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" console="false" env-hash="-516381900687258877" id="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="Ac6 SW4 STM32 MCU Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/> <language-scope id="org.eclipse.cdt.core.g++"/>
</provider>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/> </extension>
</configuration>
<provider class="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" console="false" env-hash="-1870342659776466326" id="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="Ac6 SW4 STM32 MCU Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true"> <configuration id="fr.ac6.managedbuild.config.gnu.cross.exe.release.1788779437" name="Release">
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
<language-scope id="org.eclipse.cdt.core.gcc"/> <provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<language-scope id="org.eclipse.cdt.core.g++"/> <provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" console="false" env-hash="-516381900687258877" id="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="Ac6 SW4 STM32 MCU Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
</provider> <language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</extension> </provider>
</extension>
</configuration> </configuration>
<configuration id="fr.ac6.managedbuild.config.gnu.cross.exe.release.1788779437" name="Release">
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" console="false" env-hash="1307432939745961523" id="fr.ac6.mcu.ide.build.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="Ac6 SW4 STM32 MCU Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>
</extension>
</configuration>
</project> </project>

20
Software/VNA_embedded/Application/App.cpp
View File

@ -219,15 +219,15 @@ void App_Start() {
} }
} }
if(sweepActive && HAL_GetTick() - lastNewPoint > 1000) { // if(sweepActive && HAL_GetTick() - lastNewPoint > 1000) {
LOG_WARN("Timed out waiting for point, last received point was %d (Status 0x%04x)", lastPoint, FPGA::GetStatus()); // LOG_WARN("Timed out waiting for point, last received point was %d (Status 0x%04x)", lastPoint, FPGA::GetStatus());
FPGA::AbortSweep(); // FPGA::AbortSweep();
// restart the current sweep // // restart the current sweep
HW::Init(); // HW::Init();
HW::Ref::update(); // HW::Ref::update();
VNA::Setup(settings, VNACallback); // VNA::Setup(settings, VNACallback);
sweepActive = true; // sweepActive = true;
lastNewPoint = HAL_GetTick(); // lastNewPoint = HAL_GetTick();
} // }
} }
} }

13
Software/VNA_embedded/Application/Drivers/Flash.cpp
View File

@ -15,11 +15,16 @@ bool Flash::isPresent() {
uint8_t recv[4]; uint8_t recv[4];
HAL_SPI_TransmitReceive(spi, send, recv, 4, 100); HAL_SPI_TransmitReceive(spi, send, recv, 4, 100);
CS(true); CS(true);
if(recv[1] != 0xEF) { // Check against valid manufacturer IDs
// wrong manufacturer ID, communication with flash not working constexpr uint8_t valid_ids[] = {0xEF, 0x68};
return false; bool valid = false;
for (uint8_t i = 0; i < sizeof(valid_ids); i++) {
if (recv[1] == valid_ids[i]) {
valid = true;
break;
}
} }
return true; return valid;
} }
void Flash::read(uint32_t address, uint16_t length, void *dest) { void Flash::read(uint32_t address, uint16_t length, void *dest) {

6
Software/VNA_embedded/Application/Drivers/USB/usb.c
View File

@ -19,7 +19,7 @@ static uint8_t *USBD_Class_GetDeviceQualifierDescriptor (uint16_t *length);
static usbd_recv_callback_t cb; static usbd_recv_callback_t cb;
static uint8_t usb_receive_buffer[1024]; static uint8_t usb_receive_buffer[1024];
static uint8_t usb_transmit_fifo[4092]; static uint8_t usb_transmit_fifo[8192];
static uint16_t usb_transmit_read_index = 0; static uint16_t usb_transmit_read_index = 0;
static uint16_t usb_transmit_fifo_level = 0; static uint16_t usb_transmit_fifo_level = 0;
static bool data_transmission_active = false; static bool data_transmission_active = false;
@ -155,8 +155,8 @@ static bool trigger_next_fifo_transmission() {
if(continous_length > usb_transmit_fifo_level) { if(continous_length > usb_transmit_fifo_level) {
continous_length = usb_transmit_fifo_level; continous_length = usb_transmit_fifo_level;
} }
if(continous_length > sizeof(usb_transmit_fifo)/ 4) { if(continous_length > sizeof(usb_transmit_fifo)/ 2) {
continous_length = sizeof(usb_transmit_fifo) / 4; continous_length = sizeof(usb_transmit_fifo) / 2;
} }
hUsbDeviceFS.ep_in[EP_DATA_IN_ADDRESS & 0x7F].total_length = continous_length; hUsbDeviceFS.ep_in[EP_DATA_IN_ADDRESS & 0x7F].total_length = continous_length;
return USBD_LL_Transmit(&hUsbDeviceFS, EP_DATA_IN_ADDRESS, &usb_transmit_fifo[usb_transmit_read_index], continous_length) == USBD_OK; return USBD_LL_Transmit(&hUsbDeviceFS, EP_DATA_IN_ADDRESS, &usb_transmit_fifo[usb_transmit_read_index], continous_length) == USBD_OK;

10
Software/VNA_embedded/Application/VNA.cpp
View File

@ -196,9 +196,13 @@ bool VNA::Setup(Protocol::SweepSettings s, SweepCallback cb) {
} }
static void PassOnData() { static void PassOnData() {
if (sweepCallback) { Protocol::PacketInfo info;
sweepCallback(data); info.type = Protocol::PacketType::Datapoint;
} info.datapoint = data;
Communication::Send(info);
// if (sweepCallback) {
// sweepCallback(data);
// }
} }
bool VNA::MeasurementDone(const FPGA::SamplingResult &result) { bool VNA::MeasurementDone(const FPGA::SamplingResult &result) {

11
Software/VNA_embedded/Inc/FreeRTOSConfig.h
View File

@ -42,9 +42,9 @@
* See http://www.freertos.org/a00110.html * See http://www.freertos.org/a00110.html
*----------------------------------------------------------*/ *----------------------------------------------------------*/
/* USER CODE BEGIN Includes */ /* USER CODE BEGIN Includes */
/* Section where include file can be added */ /* Section where include file can be added */
/* USER CODE END Includes */ /* USER CODE END Includes */
/* Ensure stdint is only used by the compiler, and not the assembler. */ /* Ensure stdint is only used by the compiler, and not the assembler. */
#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__) #if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
@ -54,14 +54,13 @@
#define configUSE_PREEMPTION 1 #define configUSE_PREEMPTION 1
#define configSUPPORT_STATIC_ALLOCATION 1 #define configSUPPORT_STATIC_ALLOCATION 1
#define configSUPPORT_DYNAMIC_ALLOCATION 1 #define configSUPPORT_DYNAMIC_ALLOCATION 0
#define configUSE_IDLE_HOOK 0 #define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0 #define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( SystemCoreClock ) #define configCPU_CLOCK_HZ ( SystemCoreClock )
#define configTICK_RATE_HZ ((TickType_t)1000) #define configTICK_RATE_HZ ((TickType_t)1000)
#define configMAX_PRIORITIES ( 7 ) #define configMAX_PRIORITIES ( 7 )
#define configMINIMAL_STACK_SIZE ((uint16_t)128) #define configMINIMAL_STACK_SIZE ((uint16_t)128)
#define configTOTAL_HEAP_SIZE ((size_t)2048)
#define configMAX_TASK_NAME_LEN ( 16 ) #define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_16_BIT_TICKS 0 #define configUSE_16_BIT_TICKS 0
#define configUSE_MUTEXES 1 #define configUSE_MUTEXES 1
@ -124,8 +123,8 @@ standard names. */
to prevent overwriting SysTick_Handler defined within STM32Cube HAL */ to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
#define xPortSysTickHandler SysTick_Handler #define xPortSysTickHandler SysTick_Handler
/* USER CODE BEGIN Defines */ /* USER CODE BEGIN Defines */
/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */ /* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
/* USER CODE END Defines */ /* USER CODE END Defines */
#endif /* FREERTOS_CONFIG_H */ #endif /* FREERTOS_CONFIG_H */

26
Software/VNA_embedded/Inc/stm32g4xx_hal_conf.h
View File

@ -15,7 +15,7 @@
* opensource.org/licenses/BSD-3-Clause * opensource.org/licenses/BSD-3-Clause
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32G4xx_HAL_CONF_H #ifndef STM32G4xx_HAL_CONF_H
@ -30,10 +30,10 @@
/* ########################## Module Selection ############################## */ /* ########################## Module Selection ############################## */
/** /**
* @brief This is the list of modules to be used in the HAL driver * @brief This is the list of modules to be used in the HAL driver
*/ */
#define HAL_MODULE_ENABLED #define HAL_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED #define HAL_ADC_MODULE_ENABLED
/*#define HAL_COMP_MODULE_ENABLED */ /*#define HAL_COMP_MODULE_ENABLED */
@ -111,9 +111,9 @@
/** /**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application. * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency * This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL). * (when HSE is used as system clock source, directly or through the PLL).
*/ */
#if !defined (HSE_VALUE) #if !defined (HSE_VALUE)
#define HSE_VALUE (8000000UL) /*!< Value of the External oscillator in Hz */ #define HSE_VALUE (8000000UL) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */ #endif /* HSE_VALUE */
@ -124,7 +124,7 @@
/** /**
* @brief Internal High Speed oscillator (HSI) value. * @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency * This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL). * (when HSI is used as system clock source, directly or through the PLL).
*/ */
#if !defined (HSI_VALUE) #if !defined (HSI_VALUE)
#define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/ #define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
@ -145,10 +145,10 @@
/** /**
* @brief Internal Low Speed oscillator (LSI) value. * @brief Internal Low Speed oscillator (LSI) value.
*/ */
#if !defined (LSI_VALUE) #if !defined (LSI_VALUE)
/*!< Value of the Internal Low Speed oscillator in Hz /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations in voltage and temperature.*/ The real value may vary depending on the variations in voltage and temperature.*/
#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/ #define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
#endif /* LSI_VALUE */ #endif /* LSI_VALUE */
/** /**
* @brief External Low Speed oscillator (LSE) value. * @brief External Low Speed oscillator (LSE) value.
@ -156,7 +156,7 @@ The real value may vary depending on the variations in voltage and temperature.*
*/ */
#if !defined (LSE_VALUE) #if !defined (LSE_VALUE)
#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */ #define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
#endif /* LSE_VALUE */ #endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT) #if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */ #define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
@ -177,10 +177,10 @@ The real value may vary depending on the variations in voltage and temperature.*
/* ########################### System Configuration ######################### */ /* ########################### System Configuration ######################### */
/** /**
* @brief This is the HAL system configuration section * @brief This is the HAL system configuration section
*/ */
#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */ #define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */ #define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
#define USE_RTOS 0U #define USE_RTOS 0U
#define PREFETCH_ENABLE 0U #define PREFETCH_ENABLE 0U
#define INSTRUCTION_CACHE_ENABLE 1U #define INSTRUCTION_CACHE_ENABLE 1U
@ -188,7 +188,7 @@ The real value may vary depending on the variations in voltage and temperature.*
/* ########################## Assert Selection ############################## */ /* ########################## Assert Selection ############################## */
/** /**
* @brief Uncomment the line below to expanse the "assert_param" macro in the * @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code * HAL drivers code
*/ */
/* #define USE_FULL_ASSERT 1U */ /* #define USE_FULL_ASSERT 1U */

2
Software/VNA_embedded/Inc/stm32g4xx_it.h
View File

@ -24,7 +24,7 @@
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Private includes ----------------------------------------------------------*/ /* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */ /* USER CODE BEGIN Includes */

4
Software/VNA_embedded/Inc/usbpd_dpm_conf.h
View File

@ -24,7 +24,7 @@
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "usbpd_pdo_defs.h" #include "usbpd_pdo_defs.h"
@ -62,7 +62,7 @@ USBPD_SettingsTypeDef DPM_Settings[USBPD_PORT_COUNT] =
{ {
.PE_SupportedSOP = USBPD_SUPPORTED_SOP_SOP , /* Supported SOP : SOP, SOP' SOP" SOP'Debug SOP"Debug */ .PE_SupportedSOP = USBPD_SUPPORTED_SOP_SOP , /* Supported SOP : SOP, SOP' SOP" SOP'Debug SOP"Debug */
.PE_SpecRevision = USBPD_SPECIFICATION_REV2,/* spec revision value */ .PE_SpecRevision = USBPD_SPECIFICATION_REV2,/* spec revision value */
.PE_DefaultRole = USBPD_PORTPOWERROLE_SNK, /* Default port role */ .PE_DefaultRole = USBPD_PORTPOWERROLE_SNK, /* Default port role */
.PE_RoleSwap = USBPD_FALSE, /* support port role swap */ .PE_RoleSwap = USBPD_FALSE, /* support port role swap */
.PE_VDMSupport = USBPD_FALSE, .PE_VDMSupport = USBPD_FALSE,
.PE_RespondsToDiscovSOP = USBPD_FALSE, /*!< Can respond successfully to a Discover Identity */ .PE_RespondsToDiscovSOP = USBPD_FALSE, /*!< Can respond successfully to a Discover Identity */

4
Software/VNA_embedded/Inc/usbpd_pdo_defs.h
View File

@ -24,7 +24,7 @@
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
@ -102,7 +102,7 @@ const uint32_t PORT0_PDO_ListSRC[USBPD_MAX_NB_PDO] =
}; };
/* Definition of Sink PDO for Port 0 */ /* Definition of Sink PDO for Port 0 */
const uint32_t PORT0_PDO_ListSNK[USBPD_MAX_NB_PDO] = const uint32_t PORT0_PDO_ListSNK[USBPD_MAX_NB_PDO] =
{ {
/* PDO 1 */ /* PDO 1 */
(0x00000000U), (0x00000000U),

436
Software/VNA_embedded/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c vendored
View File

@ -1,436 +0,0 @@
/*
* FreeRTOS Kernel V10.0.1
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
/*
* A sample implementation of pvPortMalloc() and vPortFree() that combines
* (coalescences) adjacent memory blocks as they are freed, and in so doing
* limits memory fragmentation.
*
* See heap_1.c, heap_2.c and heap_3.c for alternative implementations, and the
* memory management pages of http://www.FreeRTOS.org for more information.
*/
#include <stdlib.h>
/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
all the API functions to use the MPU wrappers. That should only be done when
task.h is included from an application file. */
#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
#include "FreeRTOS.h"
#include "task.h"
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
#error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
#endif
/* Block sizes must not get too small. */
#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( xHeapStructSize << 1 ) )
/* Assumes 8bit bytes! */
#define heapBITS_PER_BYTE ( ( size_t ) 8 )
/* Allocate the memory for the heap. */
#if( configAPPLICATION_ALLOCATED_HEAP == 1 )
/* The application writer has already defined the array used for the RTOS
heap - probably so it can be placed in a special segment or address. */
extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
#else
static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
#endif /* configAPPLICATION_ALLOCATED_HEAP */
/* Define the linked list structure. This is used to link free blocks in order
of their memory address. */
typedef struct A_BLOCK_LINK
{
struct A_BLOCK_LINK *pxNextFreeBlock; /*<< The next free block in the list. */
size_t xBlockSize; /*<< The size of the free block. */
} BlockLink_t;
/*-----------------------------------------------------------*/
/*
* Inserts a block of memory that is being freed into the correct position in
* the list of free memory blocks. The block being freed will be merged with
* the block in front it and/or the block behind it if the memory blocks are
* adjacent to each other.
*/
static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert );
/*
* Called automatically to setup the required heap structures the first time
* pvPortMalloc() is called.
*/
static void prvHeapInit( void );
/*-----------------------------------------------------------*/
/* The size of the structure placed at the beginning of each allocated memory
block must by correctly byte aligned. */
static const size_t xHeapStructSize = ( sizeof( BlockLink_t ) + ( ( size_t ) ( portBYTE_ALIGNMENT - 1 ) ) ) & ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
/* Create a couple of list links to mark the start and end of the list. */
static BlockLink_t xStart, *pxEnd = NULL;
/* Keeps track of the number of free bytes remaining, but says nothing about
fragmentation. */
static size_t xFreeBytesRemaining = 0U;
static size_t xMinimumEverFreeBytesRemaining = 0U;
/* Gets set to the top bit of an size_t type. When this bit in the xBlockSize
member of an BlockLink_t structure is set then the block belongs to the
application. When the bit is free the block is still part of the free heap
space. */
static size_t xBlockAllocatedBit = 0;
/*-----------------------------------------------------------*/
void *pvPortMalloc( size_t xWantedSize )
{
BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
void *pvReturn = NULL;
vTaskSuspendAll();
{
/* If this is the first call to malloc then the heap will require
initialisation to setup the list of free blocks. */
if( pxEnd == NULL )
{
prvHeapInit();
}
else
{
mtCOVERAGE_TEST_MARKER();
}
/* Check the requested block size is not so large that the top bit is
set. The top bit of the block size member of the BlockLink_t structure
is used to determine who owns the block - the application or the
kernel, so it must be free. */
if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
{
/* The wanted size is increased so it can contain a BlockLink_t
structure in addition to the requested amount of bytes. */
if( xWantedSize > 0 )
{
xWantedSize += xHeapStructSize;
/* Ensure that blocks are always aligned to the required number
of bytes. */
if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
{
/* Byte alignment required. */
xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
else
{
mtCOVERAGE_TEST_MARKER();
}
if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
{
/* Traverse the list from the start (lowest address) block until
one of adequate size is found. */
pxPreviousBlock = &xStart;
pxBlock = xStart.pxNextFreeBlock;
while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
{
pxPreviousBlock = pxBlock;
pxBlock = pxBlock->pxNextFreeBlock;
}
/* If the end marker was reached then a block of adequate size
was not found. */
if( pxBlock != pxEnd )
{
/* Return the memory space pointed to - jumping over the
BlockLink_t structure at its start. */
pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
/* This block is being returned for use so must be taken out
of the list of free blocks. */
pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
/* If the block is larger than required it can be split into
two. */
if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
{
/* This block is to be split into two. Create a new
block following the number of bytes requested. The void
cast is used to prevent byte alignment warnings from the
compiler. */
pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
/* Calculate the sizes of two blocks split from the
single block. */
pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
pxBlock->xBlockSize = xWantedSize;
/* Insert the new block into the list of free blocks. */
prvInsertBlockIntoFreeList( pxNewBlockLink );
}
else
{
mtCOVERAGE_TEST_MARKER();
}
xFreeBytesRemaining -= pxBlock->xBlockSize;
if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
{
xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
}
else
{
mtCOVERAGE_TEST_MARKER();
}
/* The block is being returned - it is allocated and owned
by the application and has no "next" block. */
pxBlock->xBlockSize |= xBlockAllocatedBit;
pxBlock->pxNextFreeBlock = NULL;
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
else
{
mtCOVERAGE_TEST_MARKER();
}
traceMALLOC( pvReturn, xWantedSize );
}
( void ) xTaskResumeAll();
#if( configUSE_MALLOC_FAILED_HOOK == 1 )
{
if( pvReturn == NULL )
{
extern void vApplicationMallocFailedHook( void );
vApplicationMallocFailedHook();
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
#endif
configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
return pvReturn;
}
/*-----------------------------------------------------------*/
void vPortFree( void *pv )
{
uint8_t *puc = ( uint8_t * ) pv;
BlockLink_t *pxLink;
if( pv != NULL )
{
/* The memory being freed will have an BlockLink_t structure immediately
before it. */
puc -= xHeapStructSize;
/* This casting is to keep the compiler from issuing warnings. */
pxLink = ( void * ) puc;
/* Check the block is actually allocated. */
configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
configASSERT( pxLink->pxNextFreeBlock == NULL );
if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
{
if( pxLink->pxNextFreeBlock == NULL )
{
/* The block is being returned to the heap - it is no longer
allocated. */
pxLink->xBlockSize &= ~xBlockAllocatedBit;
vTaskSuspendAll();
{
/* Add this block to the list of free blocks. */
xFreeBytesRemaining += pxLink->xBlockSize;
traceFREE( pv, pxLink->xBlockSize );
prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
}
( void ) xTaskResumeAll();
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
}
/*-----------------------------------------------------------*/
size_t xPortGetFreeHeapSize( void )
{
return xFreeBytesRemaining;
}
/*-----------------------------------------------------------*/
size_t xPortGetMinimumEverFreeHeapSize( void )
{
return xMinimumEverFreeBytesRemaining;
}
/*-----------------------------------------------------------*/
void vPortInitialiseBlocks( void )
{
/* This just exists to keep the linker quiet. */
}
/*-----------------------------------------------------------*/
static void prvHeapInit( void )
{
BlockLink_t *pxFirstFreeBlock;
uint8_t *pucAlignedHeap;
size_t uxAddress;
size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
/* Ensure the heap starts on a correctly aligned boundary. */
uxAddress = ( size_t ) ucHeap;
if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
{
uxAddress += ( portBYTE_ALIGNMENT - 1 );
uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
}
pucAlignedHeap = ( uint8_t * ) uxAddress;
/* xStart is used to hold a pointer to the first item in the list of free
blocks. The void cast is used to prevent compiler warnings. */
xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
xStart.xBlockSize = ( size_t ) 0;
/* pxEnd is used to mark the end of the list of free blocks and is inserted
at the end of the heap space. */
uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
uxAddress -= xHeapStructSize;
uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
pxEnd = ( void * ) uxAddress;
pxEnd->xBlockSize = 0;
pxEnd->pxNextFreeBlock = NULL;
/* To start with there is a single free block that is sized to take up the
entire heap space, minus the space taken by pxEnd. */
pxFirstFreeBlock = ( void * ) pucAlignedHeap;
pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
/* Only one block exists - and it covers the entire usable heap space. */
xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
/* Work out the position of the top bit in a size_t variable. */
xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
}
/*-----------------------------------------------------------*/
static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
{
BlockLink_t *pxIterator;
uint8_t *puc;
/* Iterate through the list until a block is found that has a higher address
than the block being inserted. */
for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
{
/* Nothing to do here, just iterate to the right position. */
}
/* Do the block being inserted, and the block it is being inserted after
make a contiguous block of memory? */
puc = ( uint8_t * ) pxIterator;
if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
{
pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
pxBlockToInsert = pxIterator;
}
else
{
mtCOVERAGE_TEST_MARKER();
}
/* Do the block being inserted, and the block it is being inserted before
make a contiguous block of memory? */
puc = ( uint8_t * ) pxBlockToInsert;
if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
{
if( pxIterator->pxNextFreeBlock != pxEnd )
{
/* Form one big block from the two blocks. */
pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
}
else
{
pxBlockToInsert->pxNextFreeBlock = pxEnd;
}
}
else
{
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
}
/* If the block being inserted plugged a gab, so was merged with the block
before and the block after, then it's pxNextFreeBlock pointer will have
already been set, and should not be set here as that would make it point
to itself. */
if( pxIterator != pxBlockToInsert )
{
pxIterator->pxNextFreeBlock = pxBlockToInsert;
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}

2
Software/VNA_embedded/Src/app_freertos.c
View File

@ -24,7 +24,7 @@
#include "main.h" #include "main.h"
/* Private includes ----------------------------------------------------------*/ /* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */ /* USER CODE BEGIN Includes */
/* USER CODE END Includes */ /* USER CODE END Includes */

31
Software/VNA_embedded/Src/main.c
View File

@ -100,7 +100,6 @@ int main(void)
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */
/* USER CODE END 1 */ /* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/ /* MCU Configuration--------------------------------------------------------*/
@ -163,7 +162,7 @@ int main(void)
/* Start scheduler */ /* Start scheduler */
osKernelStart(); osKernelStart();
/* We should never get here as control is now taken by the scheduler */ /* We should never get here as control is now taken by the scheduler */
/* Infinite loop */ /* Infinite loop */
@ -187,10 +186,10 @@ void SystemClock_Config(void)
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
/** Configure the main internal regulator output voltage /** Configure the main internal regulator output voltage
*/ */
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST); HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
/** Initializes the CPU, AHB and APB busses clocks /** Initializes the CPU, AHB and APB busses clocks
*/ */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSI48; RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSI48;
RCC_OscInitStruct.HSIState = RCC_HSI_ON; RCC_OscInitStruct.HSIState = RCC_HSI_ON;
@ -207,7 +206,7 @@ void SystemClock_Config(void)
{ {
Error_Handler(); Error_Handler();
} }
/** Initializes the CPU, AHB and APB busses clocks /** Initializes the CPU, AHB and APB busses clocks
*/ */
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
@ -220,7 +219,7 @@ void SystemClock_Config(void)
{ {
Error_Handler(); Error_Handler();
} }
/** Initializes the peripherals clocks /** Initializes the peripherals clocks
*/ */
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_I2C2 PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_I2C2
|RCC_PERIPHCLK_USB|RCC_PERIPHCLK_ADC12; |RCC_PERIPHCLK_USB|RCC_PERIPHCLK_ADC12;
@ -252,7 +251,7 @@ static void MX_ADC1_Init(void)
/* USER CODE BEGIN ADC1_Init 1 */ /* USER CODE BEGIN ADC1_Init 1 */
/* USER CODE END ADC1_Init 1 */ /* USER CODE END ADC1_Init 1 */
/** Common config /** Common config
*/ */
hadc1.Instance = ADC1; hadc1.Instance = ADC1;
hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
@ -274,14 +273,14 @@ static void MX_ADC1_Init(void)
{ {
Error_Handler(); Error_Handler();
} }
/** Configure the ADC multi-mode /** Configure the ADC multi-mode
*/ */
multimode.Mode = ADC_MODE_INDEPENDENT; multimode.Mode = ADC_MODE_INDEPENDENT;
if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK) if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
{ {
Error_Handler(); Error_Handler();
} }
/** Configure Regular Channel /** Configure Regular Channel
*/ */
sConfig.Channel = ADC_CHANNEL_TEMPSENSOR_ADC1; sConfig.Channel = ADC_CHANNEL_TEMPSENSOR_ADC1;
sConfig.Rank = ADC_REGULAR_RANK_1; sConfig.Rank = ADC_REGULAR_RANK_1;
@ -327,13 +326,13 @@ static void MX_I2C2_Init(void)
{ {
Error_Handler(); Error_Handler();
} }
/** Configure Analogue filter /** Configure Analogue filter
*/ */
if (HAL_I2CEx_ConfigAnalogFilter(&hi2c2, I2C_ANALOGFILTER_ENABLE) != HAL_OK) if (HAL_I2CEx_ConfigAnalogFilter(&hi2c2, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
{ {
Error_Handler(); Error_Handler();
} }
/** Configure Digital filter /** Configure Digital filter
*/ */
if (HAL_I2CEx_ConfigDigitalFilter(&hi2c2, 0) != HAL_OK) if (HAL_I2CEx_ConfigDigitalFilter(&hi2c2, 0) != HAL_OK)
{ {
@ -554,7 +553,7 @@ static void MX_UCPD1_Init(void)
LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_UCPD1); LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_UCPD1);
/* UCPD1 DMA Init */ /* UCPD1 DMA Init */
/* UCPD1_RX Init */ /* UCPD1_RX Init */
LL_DMA_SetPeriphRequest(DMA1, LL_DMA_CHANNEL_1, LL_DMAMUX_REQ_UCPD1_RX); LL_DMA_SetPeriphRequest(DMA1, LL_DMA_CHANNEL_1, LL_DMAMUX_REQ_UCPD1_RX);
@ -683,10 +682,10 @@ static void MX_USB_PCD_Init(void)
} }
/** /**
* Enable DMA controller clock * Enable DMA controller clock
*/ */
static void MX_DMA_Init(void) static void MX_DMA_Init(void)
{ {
/* DMA controller clock enable */ /* DMA controller clock enable */
__HAL_RCC_DMAMUX1_CLK_ENABLE(); __HAL_RCC_DMAMUX1_CLK_ENABLE();
@ -797,7 +796,7 @@ void StartDefaultTask(void const * argument)
{ {
osDelay(1); osDelay(1);
} }
/* USER CODE END 5 */ /* USER CODE END 5 */
} }
/** /**
@ -842,7 +841,7 @@ void Error_Handler(void)
* @retval None * @retval None
*/ */
void assert_failed(uint8_t *file, uint32_t line) void assert_failed(uint8_t *file, uint32_t line)
{ {
/* USER CODE BEGIN 6 */ /* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number, /* User can add his own implementation to report the file name and line number,
tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */

68
Software/VNA_embedded/Src/stm32g4xx_hal_msp.c
View File

@ -61,7 +61,7 @@ extern DMA_HandleTypeDef hdma_spi1_tx;
/* USER CODE BEGIN 0 */ /* USER CODE BEGIN 0 */
/* USER CODE END 0 */ /* USER CODE END 0 */
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/** /**
* Initializes the Global MSP. * Initializes the Global MSP.
@ -142,12 +142,12 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
/* USER CODE BEGIN I2C2_MspInit 0 */ /* USER CODE BEGIN I2C2_MspInit 0 */
/* USER CODE END I2C2_MspInit 0 */ /* USER CODE END I2C2_MspInit 0 */
__HAL_RCC_GPIOC_CLK_ENABLE(); __HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE();
/**I2C2 GPIO Configuration /**I2C2 GPIO Configuration
PC4 ------> I2C2_SCL PC4 ------> I2C2_SCL
PA8 ------> I2C2_SDA PA8 ------> I2C2_SDA
*/ */
GPIO_InitStruct.Pin = GPIO_PIN_4; GPIO_InitStruct.Pin = GPIO_PIN_4;
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
@ -187,10 +187,10 @@ void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
/* USER CODE END I2C2_MspDeInit 0 */ /* USER CODE END I2C2_MspDeInit 0 */
/* Peripheral clock disable */ /* Peripheral clock disable */
__HAL_RCC_I2C2_CLK_DISABLE(); __HAL_RCC_I2C2_CLK_DISABLE();
/**I2C2 GPIO Configuration /**I2C2 GPIO Configuration
PC4 ------> I2C2_SCL PC4 ------> I2C2_SCL
PA8 ------> I2C2_SDA PA8 ------> I2C2_SDA
*/ */
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_4); HAL_GPIO_DeInit(GPIOC, GPIO_PIN_4);
@ -219,12 +219,12 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
/* USER CODE END SPI1_MspInit 0 */ /* USER CODE END SPI1_MspInit 0 */
/* Peripheral clock enable */ /* Peripheral clock enable */
__HAL_RCC_SPI1_CLK_ENABLE(); __HAL_RCC_SPI1_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE();
/**SPI1 GPIO Configuration /**SPI1 GPIO Configuration
PA5 ------> SPI1_SCK PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI PA7 ------> SPI1_MOSI
*/ */
GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
@ -279,11 +279,11 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
/* USER CODE END SPI2_MspInit 0 */ /* USER CODE END SPI2_MspInit 0 */
/* Peripheral clock enable */ /* Peripheral clock enable */
__HAL_RCC_SPI2_CLK_ENABLE(); __HAL_RCC_SPI2_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE();
/**SPI2 GPIO Configuration /**SPI2 GPIO Configuration
PB13 ------> SPI2_SCK PB13 ------> SPI2_SCK
PB15 ------> SPI2_MOSI PB15 ------> SPI2_MOSI
*/ */
GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_15; GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_15;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
@ -314,11 +314,11 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
/* USER CODE END SPI1_MspDeInit 0 */ /* USER CODE END SPI1_MspDeInit 0 */
/* Peripheral clock disable */ /* Peripheral clock disable */
__HAL_RCC_SPI1_CLK_DISABLE(); __HAL_RCC_SPI1_CLK_DISABLE();
/**SPI1 GPIO Configuration /**SPI1 GPIO Configuration
PA5 ------> SPI1_SCK PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI PA7 ------> SPI1_MOSI
*/ */
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7); HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
@ -336,10 +336,10 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
/* USER CODE END SPI2_MspDeInit 0 */ /* USER CODE END SPI2_MspDeInit 0 */
/* Peripheral clock disable */ /* Peripheral clock disable */
__HAL_RCC_SPI2_CLK_DISABLE(); __HAL_RCC_SPI2_CLK_DISABLE();
/**SPI2 GPIO Configuration /**SPI2 GPIO Configuration
PB13 ------> SPI2_SCK PB13 ------> SPI2_SCK
PB15 ------> SPI2_MOSI PB15 ------> SPI2_MOSI
*/ */
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13|GPIO_PIN_15); HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13|GPIO_PIN_15);
@ -394,10 +394,10 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
/* USER CODE BEGIN TIM2_MspPostInit 0 */ /* USER CODE BEGIN TIM2_MspPostInit 0 */
/* USER CODE END TIM2_MspPostInit 0 */ /* USER CODE END TIM2_MspPostInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE();
/**TIM2 GPIO Configuration /**TIM2 GPIO Configuration
PA15 ------> TIM2_CH1 PA15 ------> TIM2_CH1
*/ */
GPIO_InitStruct.Pin = GPIO_PIN_15; GPIO_InitStruct.Pin = GPIO_PIN_15;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
@ -464,12 +464,12 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
/* USER CODE END USART3_MspInit 0 */ /* USER CODE END USART3_MspInit 0 */
/* Peripheral clock enable */ /* Peripheral clock enable */
__HAL_RCC_USART3_CLK_ENABLE(); __HAL_RCC_USART3_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE(); __HAL_RCC_GPIOC_CLK_ENABLE();
/**USART3 GPIO Configuration /**USART3 GPIO Configuration
PB11 ------> USART3_RX PB11 ------> USART3_RX
PC10 ------> USART3_TX PC10 ------> USART3_TX
*/ */
GPIO_InitStruct.Pin = GPIO_PIN_11; GPIO_InitStruct.Pin = GPIO_PIN_11;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
@ -507,10 +507,10 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
/* USER CODE END USART3_MspDeInit 0 */ /* USER CODE END USART3_MspDeInit 0 */
/* Peripheral clock disable */ /* Peripheral clock disable */
__HAL_RCC_USART3_CLK_DISABLE(); __HAL_RCC_USART3_CLK_DISABLE();
/**USART3 GPIO Configuration /**USART3 GPIO Configuration
PB11 ------> USART3_RX PB11 ------> USART3_RX
PC10 ------> USART3_TX PC10 ------> USART3_TX
*/ */
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11); HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11);
@ -537,11 +537,11 @@ void HAL_PCD_MspInit(PCD_HandleTypeDef* hpcd)
/* USER CODE BEGIN USB_MspInit 0 */ /* USER CODE BEGIN USB_MspInit 0 */
/* USER CODE END USB_MspInit 0 */ /* USER CODE END USB_MspInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE();
/**USB GPIO Configuration /**USB GPIO Configuration
PA11 ------> USB_DM PA11 ------> USB_DM
PA12 ------> USB_DP PA12 ------> USB_DP
*/ */
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
@ -573,10 +573,10 @@ void HAL_PCD_MspDeInit(PCD_HandleTypeDef* hpcd)
/* USER CODE END USB_MspDeInit 0 */ /* USER CODE END USB_MspDeInit 0 */
/* Peripheral clock disable */ /* Peripheral clock disable */
__HAL_RCC_USB_CLK_DISABLE(); __HAL_RCC_USB_CLK_DISABLE();
/**USB GPIO Configuration /**USB GPIO Configuration
PA11 ------> USB_DM PA11 ------> USB_DM
PA12 ------> USB_DP PA12 ------> USB_DP
*/ */
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12); HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12);

36
Software/VNA_embedded/Src/stm32g4xx_hal_timebase_tim.c
View File

@ -21,21 +21,21 @@
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32g4xx_hal.h" #include "stm32g4xx_hal.h"
#include "stm32g4xx_hal_tim.h" #include "stm32g4xx_hal_tim.h"
/* Private typedef -----------------------------------------------------------*/ /* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
TIM_HandleTypeDef htim17; TIM_HandleTypeDef htim17;
/* Private function prototypes -----------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/ /* Private functions ---------------------------------------------------------*/
/** /**
* @brief This function configures the TIM17 as a time base source. * @brief This function configures the TIM17 as a time base source.
* The time source is configured to have 1ms time base with a dedicated * The time source is configured to have 1ms time base with a dedicated
* Tick interrupt priority. * Tick interrupt priority.
* @note This function is called automatically at the beginning of program after * @note This function is called automatically at the beginning of program after
* reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig(). * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
* @param TickPriority: Tick interrupt priority. * @param TickPriority: Tick interrupt priority.
* @retval HAL status * @retval HAL status
*/ */
@ -45,28 +45,28 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
uint32_t uwTimclock = 0; uint32_t uwTimclock = 0;
uint32_t uwPrescalerValue = 0; uint32_t uwPrescalerValue = 0;
uint32_t pFLatency; uint32_t pFLatency;
/*Configure the TIM17 IRQ priority */ /*Configure the TIM17 IRQ priority */
HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM17_IRQn, TickPriority ,0); HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM17_IRQn, TickPriority ,0);
/* Enable the TIM17 global Interrupt */ /* Enable the TIM17 global Interrupt */
HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM17_IRQn); HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM17_IRQn);
/* Enable TIM17 clock */ /* Enable TIM17 clock */
__HAL_RCC_TIM17_CLK_ENABLE(); __HAL_RCC_TIM17_CLK_ENABLE();
/* Get clock configuration */ /* Get clock configuration */
HAL_RCC_GetClockConfig(&clkconfig, &pFLatency); HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
/* Compute TIM17 clock */ /* Compute TIM17 clock */
uwTimclock = HAL_RCC_GetPCLK2Freq(); uwTimclock = HAL_RCC_GetPCLK2Freq();
/* Compute the prescaler value to have TIM17 counter clock equal to 1MHz */ /* Compute the prescaler value to have TIM17 counter clock equal to 1MHz */
uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000) - 1); uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000) - 1);
/* Initialize TIM17 */ /* Initialize TIM17 */
htim17.Instance = TIM17; htim17.Instance = TIM17;
/* Initialize TIMx peripheral as follow: /* Initialize TIMx peripheral as follow:
+ Period = [(TIM17CLK/1000) - 1]. to have a (1/1000) s time base. + Period = [(TIM17CLK/1000) - 1]. to have a (1/1000) s time base.
+ Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock. + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
@ -82,7 +82,7 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
/* Start the TIM time Base generation in interrupt mode */ /* Start the TIM time Base generation in interrupt mode */
return HAL_TIM_Base_Start_IT(&htim17); return HAL_TIM_Base_Start_IT(&htim17);
} }
/* Return function status */ /* Return function status */
return HAL_ERROR; return HAL_ERROR;
} }
@ -96,7 +96,7 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
void HAL_SuspendTick(void) void HAL_SuspendTick(void)
{ {
/* Disable TIM17 update Interrupt */ /* Disable TIM17 update Interrupt */
__HAL_TIM_DISABLE_IT(&htim17, TIM_IT_UPDATE); __HAL_TIM_DISABLE_IT(&htim17, TIM_IT_UPDATE);
} }
/** /**

6
Software/VNA_embedded/Src/stm32g4xx_it.c
View File

@ -67,7 +67,7 @@ extern TIM_HandleTypeDef htim17;
/* USER CODE END EV */ /* USER CODE END EV */
/******************************************************************************/ /******************************************************************************/
/* Cortex-M4 Processor Interruption and Exception Handlers */ /* Cortex-M4 Processor Interruption and Exception Handlers */
/******************************************************************************/ /******************************************************************************/
/** /**
* @brief This function handles Non maskable interrupt. * @brief This function handles Non maskable interrupt.
@ -170,7 +170,7 @@ void DMA1_Channel1_IRQHandler(void)
/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
/* USER CODE END DMA1_Channel1_IRQn 0 */ /* USER CODE END DMA1_Channel1_IRQn 0 */
/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */ /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
/* USER CODE END DMA1_Channel1_IRQn 1 */ /* USER CODE END DMA1_Channel1_IRQn 1 */
@ -184,7 +184,7 @@ void DMA1_Channel2_IRQHandler(void)
/* USER CODE BEGIN DMA1_Channel2_IRQn 0 */ /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
/* USER CODE END DMA1_Channel2_IRQn 0 */ /* USER CODE END DMA1_Channel2_IRQn 0 */
/* USER CODE BEGIN DMA1_Channel2_IRQn 1 */ /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
/* USER CODE END DMA1_Channel2_IRQn 1 */ /* USER CODE END DMA1_Channel2_IRQn 1 */

2
Software/VNA_embedded/Src/usbpd.c
View File

@ -63,7 +63,7 @@ void MX_USBPD_Init(void)
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */

4
Software/VNA_embedded/Src/usbpd_dpm_user.c
View File

@ -394,11 +394,11 @@ USBPD_FunctionalState USBPD_DPM_IsPowerReady(uint8_t PortNum, USBPD_VSAFE_Status
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */

19
Software/VNA_embedded/VNA_embedded.ioc
View File

@ -86,7 +86,7 @@ FREERTOS.INCLUDE_vTaskPrioritySet=0
FREERTOS.INCLUDE_vTaskSuspend=1 FREERTOS.INCLUDE_vTaskSuspend=1
FREERTOS.INCLUDE_xTaskResumeFromISR=0 FREERTOS.INCLUDE_xTaskResumeFromISR=0
FREERTOS.IPParameters=Tasks01,INCLUDE_vTaskDelete,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_xTaskResumeFromISR,INCLUDE_vTaskSuspend,MEMORY_ALLOCATION,configTOTAL_HEAP_SIZE,configENABLE_BACKWARD_COMPATIBILITY,configUSE_MUTEXES,FootprintOK FREERTOS.IPParameters=Tasks01,INCLUDE_vTaskDelete,INCLUDE_vTaskPrioritySet,INCLUDE_uxTaskPriorityGet,INCLUDE_xTaskResumeFromISR,INCLUDE_vTaskSuspend,MEMORY_ALLOCATION,configTOTAL_HEAP_SIZE,configENABLE_BACKWARD_COMPATIBILITY,configUSE_MUTEXES,FootprintOK
FREERTOS.MEMORY_ALLOCATION=2 FREERTOS.MEMORY_ALLOCATION=1
FREERTOS.Tasks01=defaultTask,0,1024,StartDefaultTask,Default,NULL,Static,defaultTaskBuffer,defaultTaskControlBlock FREERTOS.Tasks01=defaultTask,0,1024,StartDefaultTask,Default,NULL,Static,defaultTaskBuffer,defaultTaskControlBlock
FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=1 FREERTOS.configENABLE_BACKWARD_COMPATIBILITY=1
FREERTOS.configTOTAL_HEAP_SIZE=2048 FREERTOS.configTOTAL_HEAP_SIZE=2048
@ -163,13 +163,17 @@ NVIC.DMA1_Channel2_IRQn=true\:7\:0\:true\:false\:true\:true\:false\:true
NVIC.DMA1_Channel3_IRQn=true\:2\:0\:true\:false\:true\:false\:false\:true NVIC.DMA1_Channel3_IRQn=true\:2\:0\:true\:false\:true\:false\:false\:true
NVIC.DMA1_Channel4_IRQn=true\:2\:0\:true\:false\:true\:false\:false\:true NVIC.DMA1_Channel4_IRQn=true\:2\:0\:true\:false\:true\:false\:false\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true NVIC.SavedPendsvIrqHandlerGenerated=true
NVIC.SavedSvcallIrqHandlerGenerated=true
NVIC.SavedSystickIrqHandlerGenerated=true
NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false
NVIC.TIM1_TRG_COM_TIM17_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true NVIC.TIM1_TRG_COM_TIM17_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
NVIC.TimeBase=TIM1_TRG_COM_TIM17_IRQn NVIC.TimeBase=TIM1_TRG_COM_TIM17_IRQn
NVIC.TimeBaseIP=TIM17 NVIC.TimeBaseIP=TIM17
@ -284,14 +288,6 @@ PC10.Signal=USART3_TX
PC4.Locked=true PC4.Locked=true
PC4.Mode=I2C PC4.Mode=I2C
PC4.Signal=I2C2_SCL PC4.Signal=I2C2_SCL
PCC.Checker=true
PCC.Line=STM32G4x1
PCC.MCU=STM32G431C(6-8-B)Ux
PCC.PartNumber=STM32G431CBUx
PCC.Seq0=0
PCC.Series=STM32G4
PCC.Temperature=25
PCC.Vdd=3.0
PF1-OSC_OUT.GPIOParameters=GPIO_Label PF1-OSC_OUT.GPIOParameters=GPIO_Label
PF1-OSC_OUT.GPIO_Label=FPGA_INIT_B PF1-OSC_OUT.GPIO_Label=FPGA_INIT_B
PF1-OSC_OUT.Locked=true PF1-OSC_OUT.Locked=true
@ -319,11 +315,12 @@ ProjectManager.PreviousToolchain=SW4STM32
ProjectManager.ProjectBuild=false ProjectManager.ProjectBuild=false
ProjectManager.ProjectFileName=VNA_embedded.ioc ProjectManager.ProjectFileName=VNA_embedded.ioc
ProjectManager.ProjectName=VNA_embedded ProjectManager.ProjectName=VNA_embedded
ProjectManager.RegisterCallBack=
ProjectManager.StackSize=0x400 ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=SW4STM32 ProjectManager.TargetToolchain=SW4STM32
ProjectManager.ToolChainLocation= ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=true ProjectManager.UnderRoot=true
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_I2C2_Init-I2C2-false-HAL-true,5-MX_SPI1_Init-SPI1-false-HAL-true,6-MX_SPI2_Init-SPI2-false-HAL-true,7-MX_UCPD1_Init-UCPD1-false-LL-true,8-MX_USART3_UART_Init-USART3-false-HAL-true,9-MX_USB_PCD_Init-USB-false-HAL-true,10-MX_USBPD_Init-USBPD-false-HAL-true,11-MX_TIM1_Init-TIM1-false-HAL-true,12-MX_TIM2_Init-TIM2-false-HAL-true,13-MX_ADC1_Init-ADC1-false-HAL-true ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_I2C2_Init-I2C2-false-HAL-true,5-MX_SPI1_Init-SPI1-false-HAL-true,6-MX_SPI2_Init-SPI2-false-HAL-true,7-MX_UCPD1_Init-UCPD1-false-LL-true,8-MX_USART3_UART_Init-USART3-false-HAL-true,9-MX_USB_PCD_Init-USB-false-HAL-true,10-MX_USBPD_Init-USBPD-false-HAL-false,11-MX_TIM1_Init-TIM1-false-HAL-true,12-MX_TIM2_Init-TIM2-false-HAL-true,13-MX_ADC1_Init-ADC1-false-HAL-true
RCC.ADC12Freq_Value=160000000 RCC.ADC12Freq_Value=160000000
RCC.AHBFreq_Value=160000000 RCC.AHBFreq_Value=160000000
RCC.APB1Freq_Value=160000000 RCC.APB1Freq_Value=160000000