Jan Käberich
5d8efd4336
user selectable IF frequencies
2022-01-15 16:11:33 +01:00
Jan Käberich
0452d2472c
Improve behaviour on full USB buffer
2021-09-24 22:21:38 +02:00
Jan Käberich
3becd19c0c
Merge branch 'master' of github.com:jankae/VNA2
2021-08-13 21:44:25 +02:00
Jan Käberich
220fa208e9
output amplitude unlevel check in VNA mode
2021-08-13 21:44:12 +02:00
Kiara Navarro
7e6de49721
fw/hardware: disable debug pins
...
When USE_DEBUG_PINS is enabled and debug session is open, their pin
initialization makes debug probe to lost session. As these pins are
not used, let's disable it by default.
2021-07-19 08:46:49 -03:00
Jan Käberich
a3d730e729
Possible reference output frequency fix?
2021-06-02 18:47:03 +02:00
Jan Käberich
2fac430381
Bugfix: use correct PLL frequency when switching between internal/external reference
2021-05-08 13:24:12 +02:00
Jan Käberich
938f444c73
TCXO offset calibration
2021-05-01 18:34:53 +02:00
Jan Käberich
06a7365a0c
minor spur/phase noise improvements
2021-03-22 21:28:03 +01:00
Jan Käberich
e3f072b307
display error flags in statusbar (overload/unlock/unlevel)
2021-02-11 22:49:47 +01:00
Jan Käberich
00f0de43f2
Timeout handling in FPGA communication (better recovery from missing reference)
2020-12-15 18:03:29 +01:00
Jan Käberich
978842a2ff
Full init when switching to any other mode than idle
2020-11-25 15:42:24 +01:00
Jan Käberich
5b771e2a86
Tracking generator with offset + incomplete automatic source/receiver calibration
2020-11-18 19:19:29 +01:00
Jan Käberich
a2389fca13
Protocol adjustment + exposing settings for DFT
2020-11-08 14:38:31 +01:00
Jan Käberich
ce475fa042
Basic DFT spectrum analysis working
2020-11-08 14:38:31 +01:00
Jan Käberich
d0640e0e42
Change ADC samplerate for points at which LO feedthrough would alias
2020-10-30 19:23:34 +01:00
Jan Käberich
6bc6b1d202
Speed improvements
2020-10-03 21:56:09 +02:00
Jan Käberich
eb64e042f4
Bugfix: race condition removed when changing settings on fast sweep
2020-09-27 11:49:30 +02:00
Jan Käberich
926392e5b9
Bugfixes and speed improvements
2020-09-26 23:34:31 +02:00
Jan Käberich
884d949dfa
CPU temperature readout
2020-09-21 14:29:31 +02:00
Jan Käberich
57b4ebfb26
mitigation for peaks caused by limited fractional divider in PLLs
2020-09-20 10:13:06 +02:00
Jan Käberich
fc3ce7a828
Improved spectrum analyzer mode
...
- Faster sweeps by changing 2.LO only when necessary and using 400kHz I2C frequency
- Added FPGA settings for selectable ADC samplerate
- Additional measurement with different ADC samplerate when signal ID is on to remove ADC images
2020-09-17 19:54:03 +02:00
Jan Käberich
38e73365df
proof-of-concept spectrum analyzer mode
2020-09-17 15:51:20 +02:00
Jan Käberich
00244022c9
Refactoring, better code encapsulation for different operating modes
2020-09-17 09:53:52 +02:00
