Jan Käberich
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e3f072b307
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display error flags in statusbar (overload/unlock/unlevel)
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2021-02-11 22:49:47 +01:00 |
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Jan Käberich
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49e0b901fd
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Optional harmonic mixing
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2020-12-18 15:03:01 +01:00 |
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Jan Käberich
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00f0de43f2
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Timeout handling in FPGA communication (better recovery from missing reference)
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2020-12-15 18:03:29 +01:00 |
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Jan Käberich
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5b771e2a86
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Tracking generator with offset + incomplete automatic source/receiver calibration
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2020-11-18 19:19:29 +01:00 |
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Jan Käberich
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026fffd588
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Working source and receiver calibration
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2020-11-17 23:03:13 +01:00 |
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Jan Käberich
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a2389fca13
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Protocol adjustment + exposing settings for DFT
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2020-11-08 14:38:31 +01:00 |
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Jan Käberich
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ce475fa042
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Basic DFT spectrum analysis working
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2020-11-08 14:38:31 +01:00 |
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Jan Käberich
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d0640e0e42
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Change ADC samplerate for points at which LO feedthrough would alias
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2020-10-30 19:23:34 +01:00 |
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Jan Käberich
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6bc6b1d202
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Speed improvements
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2020-10-03 21:56:09 +02:00 |
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Jan Käberich
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2157b3f3c4
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Improved USB throughput, stimulus power up to 0dbm, fine tuning of dynamic range
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2020-09-29 23:03:20 +02:00 |
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Jan Käberich
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eb64e042f4
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Bugfix: race condition removed when changing settings on fast sweep
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2020-09-27 11:49:30 +02:00 |
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Jan Käberich
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926392e5b9
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Bugfixes and speed improvements
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2020-09-26 23:34:31 +02:00 |
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Jan Käberich
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57b4ebfb26
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mitigation for peaks caused by limited fractional divider in PLLs
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2020-09-20 10:13:06 +02:00 |
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Jan Käberich
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38e73365df
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proof-of-concept spectrum analyzer mode
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2020-09-17 15:51:20 +02:00 |
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Jan Käberich
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00244022c9
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Refactoring, better code encapsulation for different operating modes
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2020-09-17 09:53:52 +02:00 |
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