Commit Graph

17 Commits

Author SHA1 Message Date
Jan Käberich
c0e4f41115 Various small bugfixes
- Improved device communication (callbacks for transmissions working properly now)
- Honor averaging when calibrating
- Ignore delayed points from last sweep during calibration
- Stop the sweep when disconnecting
2020-10-29 19:27:04 +01:00
Jan Käberich
fcab7f499d Merge branch 'master' of github.com:jankae/VNA2 2020-10-27 22:20:55 +01:00
Jan Käberich
e68a9abffe Proof-of-concept TDR measurements 2020-10-27 22:07:14 +01:00
Jan Käberich
78ecffbaac backup button icons in case of missing theme 2020-10-25 00:12:46 +02:00
Jan Käberich
398db2253d Averaging of traces for VNA/SA mode 2020-10-23 11:39:07 +02:00
Jan Käberich
74e068d8d1 Customizable graph colors 2020-10-22 21:12:33 +02:00
Jan Käberich
978ac89aa9 Remember/set default values for signal generator/spectrum analyzer 2020-10-22 17:13:36 +02:00
Jan Käberich
49fb02be23 Min/Max/Delta markers 2020-10-20 17:03:49 +02:00
Jan Käberich
49917c4b19 Through normalization and TRL calibration added 2020-10-03 13:01:59 +02:00
Jan Käberich
2157b3f3c4 Improved USB throughput, stimulus power up to 0dbm, fine tuning of dynamic range 2020-09-29 23:03:20 +02:00
Jan Käberich
926392e5b9 Bugfixes and speed improvements 2020-09-26 23:34:31 +02:00
Jan Käberich
57b4ebfb26 mitigation for peaks caused by limited fractional divider in PLLs 2020-09-20 10:13:06 +02:00
Jan Käberich
fc3ce7a828 Improved spectrum analyzer mode
- Faster sweeps by changing 2.LO only when necessary and using 400kHz I2C frequency
- Added FPGA settings for selectable ADC samplerate
- Additional measurement with different ADC samplerate when signal ID is on to remove ADC images
2020-09-17 19:54:03 +02:00
Jan Käberich
38e73365df proof-of-concept spectrum analyzer mode 2020-09-17 15:51:20 +02:00
Jan Käberich
de8761545d Experimental feature: only excite one port when other traces are paused 2020-09-15 23:22:08 +02:00
Jan Käberich
aae01a602e Working generator mode 2020-09-13 18:01:32 +02:00
Jan Käberich
b7033a029e Refactoring: splitting mode logic into different classes 2020-09-13 14:44:45 +02:00