Jan Käberich
f889ec854b
Test of DFT implementation in FPGA
2020-11-08 14:38:31 +01:00
Jan Käberich
2157b3f3c4
Improved USB throughput, stimulus power up to 0dbm, fine tuning of dynamic range
2020-09-29 23:03:20 +02:00
Jan Käberich
926392e5b9
Bugfixes and speed improvements
2020-09-26 23:34:31 +02:00
Jan Käberich
57b4ebfb26
mitigation for peaks caused by limited fractional divider in PLLs
2020-09-20 10:13:06 +02:00
Jan Käberich
fc3ce7a828
Improved spectrum analyzer mode
...
- Faster sweeps by changing 2.LO only when necessary and using 400kHz I2C frequency
- Added FPGA settings for selectable ADC samplerate
- Additional measurement with different ADC samplerate when signal ID is on to remove ADC images
2020-09-17 19:54:03 +02:00
Jan Käberich
38e73365df
proof-of-concept spectrum analyzer mode
2020-09-17 15:51:20 +02:00
Jan Käberich
76875c2316
Amplitude factor corrected
2020-09-17 09:54:21 +02:00
Jan Käberich
d9d00b8c71
Windowing option added to sampling
2020-09-16 16:13:06 +02:00
Jan Käberich
de8761545d
Experimental feature: only excite one port when other traces are paused
2020-09-15 23:22:08 +02:00
Jan Käberich
4cbd60e62d
Bugfixes and improvements for new hardware
2020-09-14 23:13:32 +02:00
Jan Käberich
7d9d5e27eb
different settling time/samples per point in sweep
2020-09-14 11:03:37 +02:00
Jan Käberich
07ba714f1f
PC Application: partial firmware update dialog
2020-08-30 22:03:41 +02:00
Jan Käberich
16f050a11e
FPGA project adapted to new pinout
2020-08-30 16:19:18 +02:00
