Generated from <b>VNA.sch</b><p> by exp-lbrs.ulp <b>CAPACITOR</b> >NAME >VALUE >NAME >VALUE <b>CAPACITOR</b> >NAME >VALUE <b>CAPACITOR</b> >NAME >VALUE <b>DIODE</b> >NAME >VALUE 6-SON (DFN), 0.95 mm pitch, 3.00 X 3.00 X 1.00 mm body, 2.40 X 1.70 mm thermal pad <p>6-pin SON (DFN) package with 0.95 mm pitch with body size 3.00 X 3.00 X 1.00 mm and thermal pad size 2.40 X 1.70 mm</p> >NAME >VALUE <b>RESISTOR</b> >NAME >VALUE >Name >Value <b>RESISTOR</b> >NAME >VALUE <b>TEST PAD</b> >NAME >VALUE >TP_SIGNAL_NAME 20-QFN, 0.50 mm pitch, 4.00 X 4.00 X 0.90 mm body, 2.70 X 2.70 mm thermal pad <p>20-pin QFN package with 0.50 mm pitch with body size 4.00 X 4.00 X 0.90 mm and thermal pad size 2.70 X 2.70 mm</p> >NAME >VALUE <b>SMA 50 Ohm</b> Board Thickness <b>0.062</b> Inch, End Launch Jack Receptacle<p> Johnson Components<br> Source: www.johnsoncomponents.com .. J502-ND.pdf >NAME >VALUE 32-QFN, 0.50 mm pitch, 5.00 X 5.00 X 0.80 mm body, 3.10 X 3.10 mm thermal pad <p>32-pin QFN package with 0.50 mm pitch with body size 5.00 X 5.00 X 0.80 mm and thermal pad size 3.10 X 3.10 mm</p> >NAME >VALUE 5-SOT23, 0.95 mm pitch, 2.40 mm span, 2.90 X 1.30 X 1.10 mm body <p>5-pin SOT23 package with 0.95 mm pitch, 2.40 mm span with body size 2.90 X 1.30 X 1.10 mm</p> >NAME >VALUE 12-QFN, 0.40 mm pitch, 1.80 X 1.80 X 0.55 mm body, 0.76 X 0.76 mm thermal pad <p>12-pin QFN package with 0.40 mm pitch with body size 1.80 X 1.80 X 0.55 mm and thermal pad size 0.76 X 0.76 mm</p> >NAME >VALUE 4-SOT223, 2.30 mm pitch, 7.00 mm span, 6.50 X 3.50 X 1.80 mm body <p>4-pin SOT223 package with 2.30 mm pitch, 7.00 mm span with body size 6.50 X 3.50 X 1.80 mm</p> >NAME >VALUE DFN4, 1.60 X 0.84 X 0.70 mm body <p>DFN4 package with body size 1.60 X 0.84 X 0.70 mm</p> >NAME >VALUE 20-QFN, 0.50 mm pitch, 4.00 X 4.00 X 0.75 mm body, 2.06 X 2.06 mm thermal pad <p>20-pin QFN package with 0.50 mm pitch with body size 4.00 X 4.00 X 0.75 mm and thermal pad size 2.06 X 2.06 mm</p> >NAME >VALUE 24-QFN, 0.50 mm pitch, 4.00 X 4.00 X 0.75 mm body, 2.70 X 2.70 mm thermal pad <p>24-pin QFN package with 0.50 mm pitch with body size 4.00 X 4.00 X 0.75 mm and thermal pad size 2.70 X 2.70 mm</p> >NAME >VALUE 8-SON (DFN), 0.50 mm pitch, 2.00 X 2.00 X 0.80 mm body, 1.60 X 0.90 mm thermal pad <p>8-pin SON (DFN) package with 0.50 mm pitch with body size 2.00 X 2.00 X 0.80 mm and thermal pad size 1.60 X 0.90 mm</p> >NAME >VALUE 8-SON, 0.50 mm pitch, 3.00 X 3.00 X 0.80 mm body, 2.38 X 1.65 mm thermal pad <p>8-pin SON package with 0.50 mm pitch with body size 3.00 X 3.00 X 0.80 mm and thermal pad size 2.38 X 1.65 mm</p> >NAME >VALUE 8-SOP, 0.65 mm pitch, 4.90 mm span, 3.00 X 3.00 X 1.10 mm body <p>8-pin SOP package with 0.65 mm pitch, 4.90 mm span with body size 3.00 X 3.00 X 1.10 mm</p> >NAME >VALUE 10-SOP, 0.50 mm pitch, 4.90 mm span, 3.00 X 3.00 X 1.10 mm body <p>10-pin SOP package with 0.50 mm pitch, 4.90 mm span with body size 3.00 X 3.00 X 1.10 mm</p> >NAME >VALUE 24-QFN, 0.50 mm pitch, 4.00 X 4.00 X 1.00 mm body, 2.50 X 2.50 mm thermal pad <p>24-pin QFN package with 0.50 mm pitch with body size 4.00 X 4.00 X 1.00 mm and thermal pad size 2.50 X 2.50 mm</p> >NAME >VALUE >NAME >VALUE >Name >Value 48-QFN, 0.50 mm pitch, 7.00 X 7.00 X 0.60 mm body, 5.60 X 5.60 mm thermal pad <p>48-pin QFN package with 0.50 mm pitch with body size 7.00 X 7.00 X 0.60 mm and thermal pad size 5.60 X 5.60 mm</p> >NAME >VALUE <b>PIN HEADER</b> >NAME >VALUE <b>CHIPLED</b><p> Source: http://www.osram.convergy.de/ ... LG_LY Q971.pdf >NAME >VALUE <b>TQ144 TQG144</b> >NAME >VALUE <b>SMALL OUTLINE INTEGRATED CIRCUIT</b><p> 150 mil (3.9 mm) body/JEDEC MS-012AA >NAME >VALUE <b>PIN HEADER</b> >NAME >VALUE 16-SON (DFN), 0.50 mm pitch, 5.00 X 4.00 X 0.80 mm body, 4.00 X 2.60 mm thermal pad <p>16-pin SON (DFN) package with 0.50 mm pitch with body size 5.00 X 4.00 X 0.80 mm and thermal pad size 4.00 X 2.60 mm</p> >NAME >VALUE 12-SON (DFN), 0.50 mm pitch, 3.00 X 3.00 X 0.90 mm body, 2.40 X 1.70 mm thermal pad <p>12-pin SON (DFN) package with 0.50 mm pitch with body size 3.00 X 3.00 X 0.90 mm and thermal pad size 2.40 X 1.70 mm</p> >NAME >VALUE >Name >Value 3-SOTFL, 0.95 mm pitch, 2.40 mm span, 2.90 X 1.80 X 0.80 mm body <p>3-pin SOTFL package with 0.95 mm pitch, 2.40 mm span with body size 2.90 X 1.80 X 0.80 mm</p> >NAME >VALUE Chip, 2.00 X 1.25 X 1.00 mm body <p>Chip package with body size 2.00 X 1.25 X 1.00 mm</p> >NAME >VALUE <b>CAPACITOR</b> <b>CAPACITOR</b> <b>CAPACITOR</b> <b>DIODE</b> 6-SON (DFN), 0.95 mm pitch, 3.00 X 3.00 X 1.00 mm body, 2.40 X 1.70 mm thermal pad <p>6-pin SON (DFN) package with 0.95 mm pitch with body size 3.00 X 3.00 X 1.00 mm and thermal pad size 2.40 X 1.70 mm</p> <b>RESISTOR</b> <b>RESISTOR</b> <b>TEST PAD</b> 20-QFN, 0.50 mm pitch, 4.00 X 4.00 X 0.90 mm body, 2.70 X 2.70 mm thermal pad <p>20-pin QFN package with 0.50 mm pitch with body size 4.00 X 4.00 X 0.90 mm and thermal pad size 2.70 X 2.70 mm</p> <b>SMA 50 Ohm</b> Board Thickness <b>0.062</b> Inch, End Launch Jack Receptacle<p> Johnson Components<br> Source: www.johnsoncomponents.com .. J502-ND.pdf 32-QFN, 0.50 mm pitch, 5.00 X 5.00 X 0.80 mm body, 3.10 X 3.10 mm thermal pad <p>32-pin QFN package with 0.50 mm pitch with body size 5.00 X 5.00 X 0.80 mm and thermal pad size 3.10 X 3.10 mm</p> 5-SOT23, 0.95 mm pitch, 2.40 mm span, 2.90 X 1.30 X 1.10 mm body <p>5-pin SOT23 package with 0.95 mm pitch, 2.40 mm span with body size 2.90 X 1.30 X 1.10 mm</p> 12-QFN, 0.40 mm pitch, 1.80 X 1.80 X 0.55 mm body, 0.76 X 0.76 mm thermal pad <p>12-pin QFN package with 0.40 mm pitch with body size 1.80 X 1.80 X 0.55 mm and thermal pad size 0.76 X 0.76 mm</p> 4-SOT223, 2.30 mm pitch, 7.00 mm span, 6.50 X 3.50 X 1.80 mm body <p>4-pin SOT223 package with 2.30 mm pitch, 7.00 mm span with body size 6.50 X 3.50 X 1.80 mm</p> DFN4, 1.60 X 0.84 X 0.70 mm body <p>DFN4 package with body size 1.60 X 0.84 X 0.70 mm</p> 20-QFN, 0.50 mm pitch, 4.00 X 4.00 X 0.75 mm body, 2.06 X 2.06 mm thermal pad <p>20-pin QFN package with 0.50 mm pitch with body size 4.00 X 4.00 X 0.75 mm and thermal pad size 2.06 X 2.06 mm</p> 24-QFN, 0.50 mm pitch, 4.00 X 4.00 X 0.75 mm body, 2.70 X 2.70 mm thermal pad <p>24-pin QFN package with 0.50 mm pitch with body size 4.00 X 4.00 X 0.75 mm and thermal pad size 2.70 X 2.70 mm</p> 8-SON (DFN), 0.50 mm pitch, 2.00 X 2.00 X 0.80 mm body, 1.60 X 0.90 mm thermal pad <p>8-pin SON (DFN) package with 0.50 mm pitch with body size 2.00 X 2.00 X 0.80 mm and thermal pad size 1.60 X 0.90 mm</p> 8-SON, 0.50 mm pitch, 3.00 X 3.00 X 0.80 mm body, 2.38 X 1.65 mm thermal pad <p>8-pin SON package with 0.50 mm pitch with body size 3.00 X 3.00 X 0.80 mm and thermal pad size 2.38 X 1.65 mm</p> 8-SOP, 0.65 mm pitch, 4.90 mm span, 3.00 X 3.00 X 1.10 mm body <p>8-pin SOP package with 0.65 mm pitch, 4.90 mm span with body size 3.00 X 3.00 X 1.10 mm</p> 10-SOP, 0.50 mm pitch, 4.90 mm span, 3.00 X 3.00 X 1.10 mm body <p>10-pin SOP package with 0.50 mm pitch, 4.90 mm span with body size 3.00 X 3.00 X 1.10 mm</p> 24-QFN, 0.50 mm pitch, 4.00 X 4.00 X 1.00 mm body, 2.50 X 2.50 mm thermal pad <p>24-pin QFN package with 0.50 mm pitch with body size 4.00 X 4.00 X 1.00 mm and thermal pad size 2.50 X 2.50 mm</p> 48-QFN, 0.50 mm pitch, 7.00 X 7.00 X 0.60 mm body, 5.60 X 5.60 mm thermal pad <p>48-pin QFN package with 0.50 mm pitch with body size 7.00 X 7.00 X 0.60 mm and thermal pad size 5.60 X 5.60 mm</p> <b>PIN HEADER</b> <b>CHIPLED</b><p> Source: http://www.osram.convergy.de/ ... LG_LY Q971.pdf <b>TQ144 TQG144</b> <b>SMALL OUTLINE INTEGRATED CIRCUIT</b><p> 150 mil (3.9 mm) body/JEDEC MS-012AA <b>PIN HEADER</b> 16-SON (DFN), 0.50 mm pitch, 5.00 X 4.00 X 0.80 mm body, 4.00 X 2.60 mm thermal pad <p>16-pin SON (DFN) package with 0.50 mm pitch with body size 5.00 X 4.00 X 0.80 mm and thermal pad size 4.00 X 2.60 mm</p> 12-SON (DFN), 0.50 mm pitch, 3.00 X 3.00 X 0.90 mm body, 2.40 X 1.70 mm thermal pad <p>12-pin SON (DFN) package with 0.50 mm pitch with body size 3.00 X 3.00 X 0.90 mm and thermal pad size 2.40 X 1.70 mm</p> 3-SOTFL, 0.95 mm pitch, 2.40 mm span, 2.90 X 1.80 X 0.80 mm body <p>3-pin SOTFL package with 0.95 mm pitch, 2.40 mm span with body size 2.90 X 1.80 X 0.80 mm</p> Chip, 2.00 X 1.25 X 1.00 mm body <p>Chip package with body size 2.00 X 1.25 X 1.00 mm</p> >VALUE >NAME >VALUE >NAME >VALUE >NAME >VALUE >NAME >VALUE >DRAWING_NAME >LAST_DATE_TIME >SHEET Sheet: >VALUE >Name >Value >NAME >VALUE >NAME >VALUE >NAME >VALUE >NAME >VALUE >NAME >VALUE >VALUE >VALUE >VALUE >VALUE >NAME >TP_SIGNAL_NAME >VALUE INT >Name >Value >VALUE >NAME >Name >Value >NAME >VALUE GND >Name >Value >NAME >VALUE GND >Name >Value >Name >Value >Name >Value >Name >Value >Name >Value >NAME >VALUE V+ V- >Name >Value >Name >Value >VALUE >NAME >Name >Value >Name >Value >NAME >VALUE >NAME >VALUE >NAME >VALUE >NAME >VALUE >NAME >VALUE >NAME >VALUE >NAME >VALUE >NAME >VALUE >NAME >VALUE >NAME >VALUE >NAME >VALUE >NAME >VALUE >Name >Value >Name >Value >Name >Value >VALUE >NAME <b>SUPPLY SYMBOL</b> <B>CAPACITOR</B>, European symbol <B>CAPACITOR</B>, European symbol <B>CAPACITOR</B>, European symbol <B>DIODE</B> <b>FRAME</b><p> DIN A3, landscape with location and doc. field <b>SUPPLY SYMBOL</b> <B>RESISTOR</B>, European symbol <b>SUPPLY SYMBOL</b> <b>SUPPLY SYMBOL</b> <b>SUPPLY SYMBOL</b> <b>SUPPLY SYMBOL</b> <b>Test pad</b> <b>SUPPLY SYMBOL</b> <b>PIN HEADER</b> <b>LED</b><p> <u>OSRAM</u>:<br> - <u>CHIPLED</u><br> LG R971, LG N971, LY N971, LG Q971, LY Q971, LO R971, LY R971 LH N974, LH R974<br> LS Q976, LO Q976, LY Q976<br> LO Q996<br> - <u>Hyper CHIPLED</u><br> LW Q18S<br> LB Q993, LB Q99A, LB R99A<br> - <u>SideLED</u><br> LS A670, LO A670, LY A670, LG A670, LP A670<br> LB A673, LV A673, LT A673, LW A673<br> LH A674<br> LY A675<br> LS A676, LA A676, LO A676, LY A676, LW A676<br> LS A679, LY A679, LG A679<br> - <u>Hyper Micro SIDELED®</u><br> LS Y876, LA Y876, LO Y876, LY Y876<br> LT Y87S<br> - <u>SmartLED</u><br> LW L88C, LW L88S<br> LB L89C, LB L89S, LG L890<br> LS L89K, LO L89K, LY L89K<br> LS L896, LA L896, LO L896, LY L896<br> - <u>TOPLED</u><br> LS T670, LO T670, LY T670, LG T670, LP T670<br> LSG T670, LSP T670, LSY T670, LOP T670, LYG T670<br> LG T671, LOG T671, LSG T671<br> LB T673, LV T673, LT T673, LW T673<br> LH T674<br> LS T676, LA T676, LO T676, LY T676, LB T676, LH T676, LSB T676, LW T676<br> LB T67C, LV T67C, LT T67C, LS T67K, LO T67K, LY T67K, LW E67C<br> LS E67B, LA E67B, LO E67B, LY E67B, LB E67C, LV E67C, LT E67C<br> LW T67C<br> LS T679, LY T679, LG T679<br> LS T770, LO T770, LY T770, LG T770, LP T770<br> LB T773, LV T773, LT T773, LW T773<br> LH T774<br> LS E675, LA E675, LY E675, LS T675<br> LS T776, LA T776, LO T776, LY T776, LB T776<br> LHGB T686<br> LT T68C, LB T68C<br> - <u>Hyper Mini TOPLED®</u><br> LB M676<br> - <u>Mini TOPLED Santana®</u><br> LG M470<br> LS M47K, LO M47K, LY M47K <p> Source: http://www.osram.convergy.de<p> <u>LUXEON:</u><br> - <u>LUMILED®</u><br> LXK2-PW12-R00, LXK2-PW12-S00, LXK2-PW14-U00, LXK2-PW14-V00<br> LXK2-PM12-R00, LXK2-PM12-S00, LXK2-PM14-U00<br> LXK2-PE12-Q00, LXK2-PE12-R00, LXK2-PE12-S00, LXK2-PE14-T00, LXK2-PE14-U00<br> LXK2-PB12-K00, LXK2-PB12-L00, LXK2-PB12-M00, LXK2-PB14-N00, LXK2-PB14-P00, LXK2-PB14-Q00<br> LXK2-PR12-L00, LXK2-PR12-M00, LXK2-PR14-Q00, LXK2-PR14-R00<br> LXK2-PD12-Q00, LXK2-PD12-R00, LXK2-PD12-S00<br> LXK2-PH12-R00, LXK2-PH12-S00<br> LXK2-PL12-P00, LXK2-PL12-Q00, LXK2-PL12-R00 <p> Source: www.luxeon.com<p> <u>KINGBRIGHT:</U><p> KA-3528ASYC<br> Source: www.kingbright.com Xilinx FPGA: 6SLX9TQG144 <b>EEPROM</b><p> 4 Mbit SPI Serial Flash7 <b>PIN HEADER</b> <b>Supply Symbols</b><p> GND, VCC, 0V, +5V, -5V, etc.<p> Please keep in mind, that these devices are necessary for the automatic wiring of the supply signals.<p> The pin name defined in the symbol is identical to the net which is to be wired automatically.<p> In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.<p> <author>Created by librarian@cadsoft.de</author> >VALUE <b>SUPPLY SYMBOL</b> <BR><big><b>GEYER ELECTRONIC --- Your producer for quartz crystals and oscillators</B></big><br><Hr> Version 1.0, 07.06.2016 <hr> <BR><BR> <br><a href="http://www.geyer-electronic.de/fileadmin/template/img/logo-geyer-electronic.png" title="Enlarge picture"> <img src="http://www.geyer-electronic.de/fileadmin/template/img/logo-geyer-electronic.png" width="320"></a><p> <HR><BR> <b>GEYER ELECTRONIC e.K.</b><br> Lochhamer Schlag 5<br> D-82166 Gräfelfing/München<br> <br> Tel: +49 89 546868-0<br> Fax: +49 89 546868-90 für Batterien und Ladetechnik<br> Fax: +49 89 546868-91 für Quarzprodukte<br> <br> <a href="http://www.geyer-electronic.de">http://www.geyer-electronic.de</a><br> <a href="mailto:info@geyer-electronic.de">info@geyer-electronic.de</a> <BR><BR> <br><HR><BR> Neither CadSoft nor Geyer-Electronic does warrant that this library is error-free or <br> that it meets your specific requirements.<br><BR> Please contact us for more information.<br><BR><br> <HR> Copyright: Geyer-Electronic 4 Pad >NAME >VALUE KXO RG 86 4 Pad >NAME >VALUE KXO-84 RG 4 Pad >NAME >VALUE KXO-83 RG 4 Pad >NAME >VALUE KXO-82 RG 4 Pad 4 Pad 4 Pad 4 Pad >NAME OUT GND VDD GND/NC <P> <table border=0 cellspacing=0 cellpadding=0 width="80%" cellpaddding=0> <tr valign="top"> <! <td width="10">&nbsp;</td> <td width="90%"> <th> <b><big> TCXO :</big></B> <b><font color="#0000FF" size="4">&nbsp;CMOS - Serie</font></b> <P> </th> <TABLE BORDER=1 CELLSPACING=2 CELLPADDING=2> <TR> <TD COLSPAN=8>&nbsp; </TD> </TR> <TR> <TD ALIGN=CENTER> <FONT SIZE=3 FACE=ARIAL><B>Model</B></FONT> </TD> <TD ALIGN=CENTER> <FONT SIZE=3 FACE=ARIAL><B>Size&nbsp;l/w/h&nbsp;[mm]</B></FONT> </TD> <TD ALIGN=CENTER> <FONT SIZE=3 FACE=ARIAL><B>Frequency&nbsp;Range</B></FONT> </TD> <TD ALIGN=CENTER> <FONT SIZE=3 FACE=ARIAL><B>Frequency<br></B></FONT> <FONT SIZE=3 FACE=ARIAL><B>Stability</B></FONT> </TD> <TD ALIGN=CENTER> <FONT SIZE=3 FACE=ARIAL><B>Temp.&nbsp;Range&nbsp;[°C]</B></FONT> </TD> <TD ALIGN=CENTER> <FONT SIZE=3 FACE=ARIAL><B>Output<br></B></FONT> <FONT SIZE=3 FACE=ARIAL><B></B></FONT> </TD> <TD ALIGN=CENTER> <FONT SIZE=3 FACE=ARIAL><B>AECQ 200<br></B></FONT> <FONT SIZE=3 FACE=ARIAL><B>availabel</B></FONT> </TD> <TD ALIGN=CENTER> <FONT SIZE=3 FACE=ARIAL><B>Datasheet</B></FONT> </TD> </TR> <TR> <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> KXO-86<BR> KXO-84<BR> KXO-83<BR> KXO-82<BR> </FONT> </TD> <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> 2.5/2.0/0.7<BR> 3.2/2.5/1.0 <BR> 5.0/3.2/1.5<BR> 7.0/5.0/2.4 <BR> </FONT> </TD> <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> 13,0 ~ 40,0 MHz<BR> 10,0 ~ 40,0 MHz<BR> 10,0 ~ 40,0 MHz<BR> 10,0 ~ 30,0 MHz<BR> </FONT> </TD> <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> ±1,0 … ±2,5ppm<BR> ±1,0 … ±2,5ppm<BR> ±1,0 … ±3,0ppm<BR> ±1,0 … ±3,0ppm<BR> </FONT> </TD> <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> (*) -30°C …+75°C<BR> (*) -40°C …+85°C<BR> (*) -40°C …+85°C<BR> (*) -30°C …+80°C<BR> </FONT> </TD> <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> CMOS<BR> CMOS<BR> CMOS<BR> CMOS<BR> </FONT> </TD> <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> -<BR> -<BR> -<BR> -<BR></FONT> </TD> <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> <a href="http://www.geyer-electronic.de/uploads/tx_userartikelfrequenz/GEYER-KXO-86-TCXO-HCMOS.pdf">KXO-86.pdf</a><BR> <a href="http://www.geyer-electronic.de/uploads/tx_userartikelfrequenz/GEYER-KXO-84-TCXO-HCMOS.pdf">KXO-84.pdf</a><BR> <a href="http://www.geyer-electronic.de/uploads/tx_userartikelfrequenz/GEYER-KXO-83-TCXO-HCMOS.pdf">KXO-83.pdf</a><BR> <a href="http://www.geyer-electronic.de/uploads/tx_userartikelfrequenz/GEYER-KXO-82-TCXO-HCMOS.pdf">KXO-82.pdf</a><BR> </FONT> </TD> </TR> </TABLE> </td> </tr> </table> <P> <br><a href="http://www.geyer-electronic.de/fileadmin/template/img/logo-geyer-electronic.png" title="Enlarge picture"> <img src="http://www.geyer-electronic.de/fileadmin/template/img/logo-geyer-electronic.png" width="150"></a><p> Details see: <a href="http://www.geyer-electronic.de/Frequenz-Produkte.9.0.html">http://www.geyer-electronic.de/Frequenz-Produkte.9.0.html</a><p> Created 2016-06-07, Hans Locher<br> 2016 (C) Geyer Quartz Technology <br> <b><font color="#ffffff" size="1">&nbsp;KXO86,KXO84,KXO83,KXO82;2550;3225;5032;7050;2,5x2,0;3,2x2,5;2.5x2.0;3.2x2.5,5,0x3,2;7,0x5,0,5.0x3.2,7.0x5.0</font></b> Port 1 Mixers, up to 200mA Port 2 Mixers, up to 200mA Reference Mixers, up to 200mA Source and 1.LO, up to 350mA I2C address: 0x42 Power Supply CLK Generation Reference CLK and 2.LO Up to 100mA 40MHz lowpass I2C address: 0xC0 Source up to 200mA current consumption All I/O using 3V3 levels 3x 3V3 Approx. 450kHz loop bandwidth 5dbm ca. -1db ca. -1db ca. 2dbm C1/C2 should not be driven above 1.8V HF Source Serial interface not used ca. 2dbm -0.5db ca. -30 to 0dbm Up to 60mA on 3V3 Attenuator/Amplifier/Switches 1. LO up to 200mA current consumption All I/O using 3V3 levels 3x 3V3 Approx. 450kHz loop bandwidth 1.LO Port 1 P1db: 0dbm -3db pad Return loss bridge Downconverter to 1.IF (ca. 60MHz) 60MHz lowpass and conversion from 250 Ohm to 28 Ohm impedance -10db pad (28 Ohm impedance) Downconverter to 1.IF (ca. 250kHz) Final IF amplifier and ADC driver 300kHz lowpass 1MS/s ADC Port 1 Port 2 P1db: 0dbm -3db pad Return loss bridge Downconverter to 1.IF (ca. 60MHz) 60MHz lowpass and conversion from 250 Ohm to 28 Ohm impedance -10db pad (28 Ohm impedance) Downconverter to 1.IF (ca. 250kHz) Final IF amplifier and ADC driver 300kHz lowpass 1MS/s ADC Port 2 Ref Signal Reference Signal FPGA + MCU Connections Place resistors for FPGA master configuration Place resistors for FPGA slave configuration FPGA Connections Since Version 6.2.2 text objects can contain more than one line, which will not be processed correctly with this version. Since Version 8.2, EAGLE supports online libraries. The ids of those online libraries will not be understood (or retained) with this version. Since Version 8.3, EAGLE supports URNs for individual library assets (packages, symbols, and devices). The URNs of those assets will not be understood (or retained) with this version. Since Version 8.3, EAGLE supports the association of 3D packages with devices in libraries, schematics, and board files. Those 3D packages will not be understood (or retained) with this version.