caiyu/LibreVNA
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38 Commits 1 Branch 0 Tags 266 MiB
C++ 50.3%
C 47%
VHDL 2.2%
QMake 0.2%
Python 0.2%
18b283b35a
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Jan Käberich 18b283b35a Partial documentation
2020-09-20 10:28:08 +02:00
Documentation Partial documentation 2020-09-20 10:28:08 +02:00
FPGA mitigation for peaks caused by limited fractional divider in PLLs 2020-09-20 10:13:06 +02:00
Hardware Trace for port switch moved to fix short with aluminium shield 2020-09-06 15:54:51 +02:00
Software mitigation for peaks caused by limited fractional divider in PLLs 2020-09-20 10:13:06 +02:00
.gitignore Schematic + some placement 2020-07-25 17:34:56 +02:00
AssembleFirmware.py PC Application: partial firmware update dialog 2020-08-30 22:03:41 +02:00