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ipcore_dir
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Added stages to FPGA protocol
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2022-04-01 23:01:22 +02:00 |
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DFT.vhd
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Use full multiplier bitwidth for windowing + increased number of DFT bins
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2020-11-08 14:38:31 +01:00 |
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Flattop.dat
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Window coefficient files added
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2020-10-29 20:07:41 +01:00 |
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Hann.dat
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Window coefficient files added
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2020-10-29 20:07:41 +01:00 |
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Kaiser.dat
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Window coefficient files added
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2020-10-29 20:07:41 +01:00 |
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MAX2871.vhd
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FPGA project adapted to new pinout
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2020-08-30 16:19:18 +02:00 |
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MCP33131.vhd
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Improved spectrum analyzer mode
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2020-09-17 19:54:03 +02:00 |
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ResetDelay.vhd
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Basic DFT spectrum analysis working
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2020-11-08 14:38:31 +01:00 |
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Sampling.vhd
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Use full multiplier bitwidth for windowing + increased number of DFT bins
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2020-11-08 14:38:31 +01:00 |
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spi_slave.vhd
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Test of DFT implementation in FPGA
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2020-11-08 14:38:31 +01:00 |
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SPIConfig.vhd
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Added stages to FPGA protocol
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2022-04-01 23:01:22 +02:00 |
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Sweep.vhd
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Added stages to FPGA protocol
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2022-04-01 23:01:22 +02:00 |
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Synchronizer.vhd
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FPGA project adapted to new pinout
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2020-08-30 16:19:18 +02:00 |
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Test_DFT.vhd
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Use full multiplier bitwidth for windowing + increased number of DFT bins
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2020-11-08 14:38:31 +01:00 |
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Test_MAX2871.vhd
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FPGA project adapted to new pinout
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2020-08-30 16:19:18 +02:00 |
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Test_MCP33131.vhd
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Improved spectrum analyzer mode
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2020-09-17 19:54:03 +02:00 |
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Test_PLL.vhd
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FPGA project adapted to new pinout
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2020-08-30 16:19:18 +02:00 |
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Test_Sampling.vhd
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Use full multiplier bitwidth for windowing + increased number of DFT bins
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2020-11-08 14:38:31 +01:00 |
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Test_SinCos.vhd
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FPGA project adapted to new pinout
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2020-08-30 16:19:18 +02:00 |
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Test_SPI.vhd
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Test of DFT implementation in FPGA
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2020-11-08 14:38:31 +01:00 |
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Test_SPICommands.vhd
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Use full multiplier bitwidth for windowing + increased number of DFT bins
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2020-11-08 14:38:31 +01:00 |
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Test_Window.vhd
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Use full multiplier bitwidth for windowing + increased number of DFT bins
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2020-11-08 14:38:31 +01:00 |
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Test_Windowing.vhd
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Use full multiplier bitwidth for windowing + increased number of DFT bins
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2020-11-08 14:38:31 +01:00 |
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top.bin
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Added stages to FPGA protocol
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2022-04-01 23:01:22 +02:00 |
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top.ucf
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Test of DFT implementation in FPGA
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2020-11-08 14:38:31 +01:00 |
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top.vhd
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Added stages to FPGA protocol
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2022-04-01 23:01:22 +02:00 |
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VNA.gise
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Added stages to FPGA protocol
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2022-04-01 23:01:22 +02:00 |
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VNA.xise
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Added stages to FPGA protocol
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2022-04-01 23:01:22 +02:00 |
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window.vhd
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Windowing option added to sampling
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2020-09-16 16:13:06 +02:00 |
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Windowing.vhd
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Use full multiplier bitwidth for windowing + increased number of DFT bins
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2020-11-08 14:38:31 +01:00 |
