caiyu/LibreVNA
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25 Commits 1 Branch 0 Tags 266 MiB
C++ 50.3%
C 47%
VHDL 2.2%
QMake 0.2%
Python 0.2%
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Jan Käberich b7033a029e Refactoring: splitting mode logic into different classes
2020-09-13 14:44:45 +02:00
FPGA PC Application: partial firmware update dialog 2020-08-30 22:03:41 +02:00
Hardware Trace for port switch moved to fix short with aluminium shield 2020-09-06 15:54:51 +02:00
Software Refactoring: splitting mode logic into different classes 2020-09-13 14:44:45 +02:00
.gitignore Schematic + some placement 2020-07-25 17:34:56 +02:00
AssembleFirmware.py PC Application: partial firmware update dialog 2020-08-30 22:03:41 +02:00