43b588c2f6
- Add manual overwrite in FPGA for hardware that is usually handled by sweep control - Use static hardware configuration for generator (no sweep active anymore)
61 lines
2.0 KiB
C++
61 lines
2.0 KiB
C++
#include <Cal.hpp>
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#include "Generator.hpp"
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#include "Manual.hpp"
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#include "Hardware.hpp"
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#include "HW_HAL.hpp"
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#include "max2871.hpp"
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#include "Si5351C.hpp"
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using namespace HWHAL;
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void Generator::Setup(Protocol::GeneratorSettings g) {
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HW::SetMode(HW::Mode::Generator);
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if(g.activePort == 0) {
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// both ports disabled, no need to configure PLLs
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Si5351.Disable(SiChannel::LowbandSource);
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FPGA::Disable(FPGA::Periphery::SourceChip);
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FPGA::Disable(FPGA::Periphery::Amplifier);
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FPGA::Disable(FPGA::Periphery::SourceRF);
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FPGA::Disable(FPGA::Periphery::PortSwitch);
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FPGA::DisableHardwareOverwrite();
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return;
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}
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g.frequency = Cal::FrequencyCorrectionToDevice(g.frequency);
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auto amplitude = HW::GetAmplitudeSettings(g.cdbm_level, g.frequency, g.applyAmplitudeCorrection, g.activePort == 2);
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// Select correct source
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bool bandSelect;
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FPGA::LowpassFilter lp = FPGA::LowpassFilter::M947;
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if(g.frequency < HW::BandSwitchFrequency) {
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bandSelect = true;
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FPGA::Disable(FPGA::Periphery::SourceChip);
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Si5351.SetCLK(SiChannel::LowbandSource, g.frequency, Si5351C::PLL::B,
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amplitude.lowBandPower);
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Si5351.Enable(SiChannel::LowbandSource);
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} else {
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bandSelect = false;
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Si5351.Disable(SiChannel::LowbandSource);
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FPGA::Enable(FPGA::Periphery::SourceChip);
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FPGA::SetMode(FPGA::Mode::SourcePLL);
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Source.SetPowerOutA(amplitude.highBandPower);
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Source.SetFrequency(g.frequency);
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Source.Update();
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FPGA::SetMode(FPGA::Mode::FPGA);
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if(g.frequency < 900000000UL) {
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lp = FPGA::LowpassFilter::M947;
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} else if(g.frequency < 1800000000UL) {
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lp = FPGA::LowpassFilter::M1880;
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} else if(g.frequency < 3500000000UL) {
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lp = FPGA::LowpassFilter::M3500;
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} else {
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lp = FPGA::LowpassFilter::None;
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}
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}
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FPGA::OverwriteHardware(amplitude.attenuator, lp, bandSelect, g.activePort == 1, g.activePort == 2);
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HW::SetOutputUnlevel(amplitude.unlevel);
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FPGA::Enable(FPGA::Periphery::Amplifier, true);
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FPGA::Enable(FPGA::Periphery::SourceRF, true);
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FPGA::Enable(FPGA::Periphery::PortSwitch, true);
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}
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