116 lines
3.3 KiB
C++
116 lines
3.3 KiB
C++
#pragma once
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#include <Cal.hpp>
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#include <cstdint>
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#include "Protocol.hpp"
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#include "FPGA/FPGA.hpp"
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#include "max2871.hpp"
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#include "Si5351C.hpp"
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#define USE_DEBUG_PINS
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#ifdef USE_DEBUG_PINS
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#define DEBUG1_GPIO GPIOA
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#define DEBUG1_PIN GPIO_PIN_13
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#define DEBUG2_GPIO GPIOA
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#define DEBUG2_PIN GPIO_PIN_14
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#define DEBUG1_LOW() do {DEBUG1_GPIO->BSRR = DEBUG1_PIN<<16; }while(0)
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#define DEBUG1_HIGH() do {DEBUG1_GPIO->BSRR = DEBUG1_PIN; }while(0)
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#define DEBUG2_LOW() do {DEBUG2_GPIO->BSRR = DEBUG2_PIN<<16; }while(0)
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#define DEBUG2_HIGH() do {DEBUG2_GPIO->BSRR = DEBUG2_PIN; }while(0)
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#else
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#define DEBUG1_LOW()
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#define DEBUG1_HIGH()
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#define DEBUG2_LOW()
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#define DEBUG2_HIGH()
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#endif
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namespace HW {
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static constexpr uint32_t ADCSamplerate = 800000;
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static constexpr uint32_t IF1 = 62000000;
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static constexpr uint32_t IF2 = 250000;
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static constexpr uint32_t LO1_minFreq = 25000000;
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static constexpr uint32_t MaxSamples = 130944;
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static constexpr uint32_t MinSamples = 16;
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static constexpr uint32_t PLLRef = 104000000;
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static constexpr uint32_t BandSwitchFrequency = 25000000;
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static constexpr uint8_t ADCprescaler = FPGA::Clockrate / ADCSamplerate;
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static_assert(ADCprescaler * ADCSamplerate == FPGA::Clockrate, "ADCSamplerate can not be reached exactly");
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static constexpr uint16_t DFTphaseInc = 4096 * IF2 / ADCSamplerate;
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static_assert(DFTphaseInc * ADCSamplerate == 4096 * IF2, "DFT can not be computed for 2.IF");
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// approximate output power at low frequencies with different source strength settings (attenuator = 0) in cdbm
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static constexpr int16_t LowBandMinPower = -1350;
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static constexpr int16_t LowBandMaxPower = -190;
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static constexpr int16_t HighBandMinPower = -1060;
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static constexpr int16_t HighBandMaxPower = -160;
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static constexpr Protocol::DeviceInfo Info = {
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.ProtocolVersion = Protocol::Version,
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.FW_major = FW_MAJOR,
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.FW_minor = FW_MINOR,
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.FW_patch = FW_PATCH,
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.HW_Revision = HW_REVISION,
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.extRefAvailable = 0,
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.extRefInUse = 0,
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.FPGA_configured = 0,
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.source_locked = 0,
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.LO1_locked = 0,
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.ADC_overload = 0,
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.unlevel = 0,
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.temp_source = 0,
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.temp_LO1 = 0,
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.temp_MCU = 0,
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.limits_minFreq = 0,
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.limits_maxFreq = 6000000000,
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.limits_minIFBW = ADCSamplerate / MaxSamples,
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.limits_maxIFBW = ADCSamplerate / MinSamples,
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.limits_maxPoints = FPGA::MaxPoints,
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.limits_cdbm_min = -4000,
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.limits_cdbm_max = 0,
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.limits_minRBW = (uint32_t) (ADCSamplerate * 2.23f / MaxSamples),
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.limits_maxRBW = (uint32_t) (ADCSamplerate * 2.23f / MinSamples),
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.limits_maxAmplitudePoints = Cal::maxPoints,
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.limits_maxFreqHarmonic = 18000000000,
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};
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enum class Mode {
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Idle,
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Manual,
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VNA,
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SA,
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};
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bool Init();
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void SetMode(Mode mode);
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void SetIdle();
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void Work();
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bool TimedOut();
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void SetOutputUnlevel(bool unlev);
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using AmplitudeSettings = struct _amplitudeSettings {
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uint8_t attenuator;
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union {
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MAX2871::Power highBandPower;
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Si5351C::DriveStrength lowBandPower;
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};
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bool unlevel;
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};
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AmplitudeSettings GetAmplitudeSettings(int16_t cdbm, uint64_t freq = 0, bool applyCorrections = false, bool port2 = false);
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bool GetTemps(uint8_t *source, uint8_t *lo);
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void fillDeviceInfo(Protocol::DeviceInfo *info, bool updateEvenWhenBusy = false);
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namespace Ref {
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bool available();
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bool usingExternal();
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// reference won't change until update is called
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void set(Protocol::ReferenceSettings s);
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void update();
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}
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}
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