161 lines
6.6 KiB
C
161 lines
6.6 KiB
C
/***************************************************************************//**
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* @file platform.h
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* @brief Header file of Platform driver.
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* @author DBogdan (dragos.bogdan@analog.com)
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********************************************************************************
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* Copyright 2014(c) Analog Devices, Inc.
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* - Neither the name of Analog Devices, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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* - The use of this software may or may not infringe the patent rights
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* of one or more patent holders. This license does not release you
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* from the requirement that you obtain separate licenses from these
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* patent holders to use this software.
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* - Use of the software either in source or binary form, must be run
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* on or directly connected to an Analog Devices Inc. component.
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*
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* THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************/
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#ifndef PLATFORM_H_
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#define PLATFORM_H_
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/******************************************************************************/
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/***************************** Include Files **********************************/
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/******************************************************************************/
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#include "stdint.h"
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#include "../util.h"
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/******************************************************************************/
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/********************** Macros and Constants Definitions **********************/
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/******************************************************************************/
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#define ADI_REG_VERSION 0x0000
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#define ADI_REG_ID 0x0004
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#define ADI_REG_RSTN 0x0040
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#define ADI_RSTN (1 << 0)
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#define ADI_MMCM_RSTN (1 << 1)
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#define ADI_REG_CNTRL 0x0044
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#define ADI_R1_MODE (1 << 2)
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#define ADI_DDR_EDGESEL (1 << 1)
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#define ADI_PIN_MODE (1 << 0)
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#define ADI_REG_STATUS 0x005C
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#define ADI_MUX_PN_ERR (1 << 3)
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#define ADI_MUX_PN_OOS (1 << 2)
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#define ADI_MUX_OVER_RANGE (1 << 1)
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#define ADI_STATUS (1 << 0)
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#define ADI_REG_DELAY_CNTRL 0x0060 /* <= v8.0 */
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#define ADI_DELAY_SEL (1 << 17)
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#define ADI_DELAY_RWN (1 << 16)
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#define ADI_DELAY_ADDRESS(x) (((x) & 0xFF) << 8)
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#define ADI_TO_DELAY_ADDRESS(x) (((x) >> 8) & 0xFF)
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#define ADI_DELAY_WDATA(x) (((x) & 0x1F) << 0)
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#define ADI_TO_DELAY_WDATA(x) (((x) >> 0) & 0x1F)
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#define ADI_REG_CHAN_CNTRL(c) (0x0400 + (c) * 0x40)
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#define ADI_PN_SEL (1 << 10) /* !v8.0 */
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#define ADI_IQCOR_ENB (1 << 9)
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#define ADI_DCFILT_ENB (1 << 8)
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#define ADI_FORMAT_SIGNEXT (1 << 6)
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#define ADI_FORMAT_TYPE (1 << 5)
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#define ADI_FORMAT_ENABLE (1 << 4)
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#define ADI_PN23_TYPE (1 << 1) /* !v8.0 */
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#define ADI_ENABLE (1 << 0)
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#define ADI_REG_CHAN_STATUS(c) (0x0404 + (c) * 0x40)
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#define ADI_PN_ERR (1 << 2)
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#define ADI_PN_OOS (1 << 1)
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#define ADI_OVER_RANGE (1 << 0)
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#define ADI_REG_CHAN_CNTRL_1(c) (0x0410 + (c) * 0x40)
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#define ADI_DCFILT_OFFSET(x) (((x) & 0xFFFF) << 16)
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#define ADI_TO_DCFILT_OFFSET(x) (((x) >> 16) & 0xFFFF)
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#define ADI_DCFILT_COEFF(x) (((x) & 0xFFFF) << 0)
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#define ADI_TO_DCFILT_COEFF(x) (((x) >> 0) & 0xFFFF)
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#define ADI_REG_CHAN_CNTRL_2(c) (0x0414 + (c) * 0x40)
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#define ADI_IQCOR_COEFF_1(x) (((x) & 0xFFFF) << 16)
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#define ADI_TO_IQCOR_COEFF_1(x) (((x) >> 16) & 0xFFFF)
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#define ADI_IQCOR_COEFF_2(x) (((x) & 0xFFFF) << 0)
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#define ADI_TO_IQCOR_COEFF_2(x) (((x) >> 0) & 0xFFFF)
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#define PCORE_VERSION(major, minor, letter) ((major << 16) | (minor << 8) | letter)
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#define PCORE_VERSION_MAJOR(version) (version >> 16)
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#define PCORE_VERSION_MINOR(version) ((version >> 8) & 0xff)
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#define PCORE_VERSION_LETTER(version) (version & 0xff)
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#define ADI_REG_CHAN_CNTRL_3(c) (0x0418 + (c) * 0x40) /* v8.0 */
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#define ADI_ADC_PN_SEL(x) (((x) & 0xF) << 16)
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#define ADI_TO_ADC_PN_SEL(x) (((x) >> 16) & 0xF)
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#define ADI_ADC_DATA_SEL(x) (((x) & 0xF) << 0)
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#define ADI_TO_ADC_DATA_SEL(x) (((x) >> 0) & 0xF)
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/* PCORE Version > 8.00 */
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#define ADI_REG_DELAY(l) (0x0800 + (l) * 0x4)
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enum adc_pn_sel {
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ADC_PN9 = 0,
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ADC_PN23A = 1,
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ADC_PN7 = 4,
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ADC_PN15 = 5,
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ADC_PN23 = 6,
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ADC_PN31 = 7,
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ADC_PN_CUSTOM = 9,
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ADC_PN_END = 10,
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};
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enum adc_data_sel {
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ADC_DATA_SEL_NORM,
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ADC_DATA_SEL_LB, /* DAC loopback */
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ADC_DATA_SEL_RAMP, /* TBD */
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};
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/******************************************************************************/
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/************************ Functions Declarations ******************************/
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/******************************************************************************/
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int32_t spi_init(uint32_t device_id,
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uint8_t clk_pha,
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uint8_t clk_pol);
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int32_t spi_read(uint8_t *data,
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uint8_t bytes_number);
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int spi_write_then_read(struct spi_device *spi,
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const unsigned char *txbuf, unsigned n_tx,
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unsigned char *rxbuf, unsigned n_rx);
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void gpio_init(uint32_t device_id);
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void gpio_direction(uint8_t pin, uint8_t direction);
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bool gpio_is_valid(int number);
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void gpio_set_value(unsigned gpio, int value);
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void udelay(unsigned long usecs);
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void mdelay(unsigned long msecs);
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unsigned long msleep_interruptible(unsigned int msecs);
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void axiadc_init(struct ad9361_rf_phy *phy);
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int axiadc_post_setup(struct ad9361_rf_phy *phy);
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unsigned int axiadc_read(struct axiadc_state *st, unsigned long reg);
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void axiadc_write(struct axiadc_state *st, unsigned reg, unsigned val);
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int axiadc_set_pnsel(struct axiadc_state *st, int channel, enum adc_pn_sel sel);
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void axiadc_idelay_set(struct axiadc_state *st, unsigned lane, unsigned val);
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#endif
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