axi_lite_pwm/ax_dma.runs/synth_1/dont_touch.xdc
2024-05-29 08:51:51 +08:00

31 lines
2.0 KiB
Tcl

# This file is automatically generated.
# It contains project source information necessary for synthesis and implementation.
# XDC: new/io.xdc
# Block Designs: bd/design_1/design_1.bd
set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_1 || ORIG_REF_NAME==design_1} -quiet] -quiet
# IP: bd/design_1/ip/design_1_ila_0_0/design_1_ila_0_0.xci
set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_1_ila_0_0 || ORIG_REF_NAME==design_1_ila_0_0} -quiet] -quiet
# IP: bd/design_1/ip/design_1_processing_system7_0_0/design_1_processing_system7_0_0.xci
set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_1_processing_system7_0_0 || ORIG_REF_NAME==design_1_processing_system7_0_0} -quiet] -quiet
# IP: bd/design_1/ip/design_1_ps7_0_axi_periph_0/design_1_ps7_0_axi_periph_0.xci
set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_1_ps7_0_axi_periph_0 || ORIG_REF_NAME==design_1_ps7_0_axi_periph_0} -quiet] -quiet
# IP: bd/design_1/ip/design_1_rst_ps7_0_49M_0/design_1_rst_ps7_0_49M_0.xci
set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_1_rst_ps7_0_49M_0 || ORIG_REF_NAME==design_1_rst_ps7_0_49M_0} -quiet] -quiet
# IP: bd/design_1/ip/design_1_system_ila_0_0/design_1_system_ila_0_0.xci
set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_1_system_ila_0_0 || ORIG_REF_NAME==design_1_system_ila_0_0} -quiet] -quiet
# IP: bd/design_1/ip/design_1_axi_pwm_v1_0_S00_AXI_0_0/design_1_axi_pwm_v1_0_S00_AXI_0_0.xci
set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_1_axi_pwm_v1_0_S00_AXI_0_0 || ORIG_REF_NAME==design_1_axi_pwm_v1_0_S00_AXI_0_0} -quiet] -quiet
# IP: bd/design_1/ip/design_1_auto_pc_0/design_1_auto_pc_0.xci
set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_1_auto_pc_0 || ORIG_REF_NAME==design_1_auto_pc_0} -quiet] -quiet
# XDC: e:/zybo_base_system/source/vivado/hw/ax_dma/ax_dma.gen/sources_1/bd/design_1/design_1_ooc.xdc