102 lines
4.2 KiB
XML
102 lines
4.2 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<GenRun Id="synth_1" LaunchPart="xc7z010iclg400-1L" LaunchTime="1716903982" LaunchIncrCheckpoint="$PSRCDIR/utils_1/imports/synth_1/axi_pwm_v1_0_S00_AXI.dcp">
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<File Type="PA-TCL" Name="design_1_wrapper.tcl"/>
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<File Type="RDS-PROPCONSTRS" Name="design_1_wrapper_drc_synth.rpt"/>
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<File Type="REPORTS-TCL" Name="design_1_wrapper_reports.tcl"/>
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<File Type="RDS-RDS" Name="design_1_wrapper.vds"/>
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<File Type="RDS-UTIL" Name="design_1_wrapper_utilization_synth.rpt"/>
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<File Type="RDS-UTIL-PB" Name="design_1_wrapper_utilization_synth.pb"/>
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<File Type="RDS-DCP" Name="design_1_wrapper.dcp"/>
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<File Type="VDS-TIMINGSUMMARY" Name="design_1_wrapper_timing_summary_synth.rpt"/>
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<File Type="VDS-TIMING-PB" Name="design_1_wrapper_timing_summary_synth.pb"/>
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<FileSet Name="sources" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1" RelGenDir="$PGENDIR/sources_1">
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<Filter Type="Srcs"/>
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<File Path="$PSRCDIR/sources_1/new/axi_pwm_v1_0_S00_AXI.v">
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<FileInfo>
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<Attr Name="UsedIn" Val="synthesis"/>
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<Attr Name="UsedIn" Val="implementation"/>
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<Attr Name="UsedIn" Val="simulation"/>
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</FileInfo>
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</File>
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<File Path="$PSRCDIR/sources_1/bd/design_1/design_1.bd">
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<FileInfo>
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<Attr Name="UsedIn" Val="synthesis"/>
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<Attr Name="UsedIn" Val="implementation"/>
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<Attr Name="UsedIn" Val="simulation"/>
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</FileInfo>
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</File>
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<File Path="$PGENDIR/sources_1/bd/design_1/hdl/design_1_wrapper.v">
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<FileInfo>
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<Attr Name="UsedIn" Val="synthesis"/>
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<Attr Name="UsedIn" Val="implementation"/>
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<Attr Name="UsedIn" Val="simulation"/>
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</FileInfo>
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</File>
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<File Path="$PSRCDIR/sources_1/bd/test_axi_v1_0_bfm_1/test_axi_v1_0_bfm_1.bd">
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<FileInfo>
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<Attr Name="AutoDisabled" Val="1"/>
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<Attr Name="UsedIn" Val="synthesis"/>
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<Attr Name="UsedIn" Val="implementation"/>
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<Attr Name="UsedIn" Val="simulation"/>
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</FileInfo>
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</File>
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<File Path="$PSRCDIR/sources_1/imports/hdl/test_axi_v1_0_bfm_1_wrapper.v">
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<FileInfo>
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<Attr Name="AutoDisabled" Val="1"/>
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<Attr Name="ImportPath" Val="$PGENDIR/sources_1/bd/test_axi_v1_0_bfm_1/hdl/test_axi_v1_0_bfm_1_wrapper.v"/>
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<Attr Name="ImportTime" Val="1716667102"/>
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<Attr Name="UsedIn" Val="synthesis"/>
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<Attr Name="UsedIn" Val="implementation"/>
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<Attr Name="UsedIn" Val="simulation"/>
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</FileInfo>
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</File>
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<File Path="$PSRCDIR/sources_1/new/vlg_design.v">
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<FileInfo>
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<Attr Name="AutoDisabled" Val="1"/>
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<Attr Name="UsedIn" Val="synthesis"/>
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<Attr Name="UsedIn" Val="implementation"/>
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<Attr Name="UsedIn" Val="simulation"/>
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</FileInfo>
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</File>
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<Config>
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<Option Name="DesignMode" Val="RTL"/>
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<Option Name="TopModule" Val="design_1_wrapper"/>
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</Config>
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</FileSet>
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<FileSet Name="constrs_in" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1">
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<Filter Type="Constrs"/>
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<File Path="$PSRCDIR/constrs_1/new/io.xdc">
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<FileInfo>
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<Attr Name="UsedIn" Val="synthesis"/>
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<Attr Name="UsedIn" Val="implementation"/>
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</FileInfo>
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</File>
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<Config>
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<Option Name="TargetConstrsFile" Val="$PSRCDIR/constrs_1/new/io.xdc"/>
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<Option Name="ConstrsType" Val="XDC"/>
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</Config>
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</FileSet>
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<FileSet Name="utils" Type="Utils" RelSrcDir="$PSRCDIR/utils_1">
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<Filter Type="Utils"/>
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<File Path="$PSRCDIR/utils_1/imports/synth_1/axi_pwm_v1_0_S00_AXI.dcp">
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<FileInfo>
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<Attr Name="UsedIn" Val="synthesis"/>
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<Attr Name="UsedIn" Val="implementation"/>
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<Attr Name="UsedInSteps" Val="synth_1"/>
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<Attr Name="AutoDcp" Val="1"/>
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</FileInfo>
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</File>
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<Config>
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<Option Name="TopAutoSet" Val="TRUE"/>
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</Config>
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</FileSet>
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<Strategy Version="1" Minor="2">
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<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2022"/>
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<Step Id="synth_design"/>
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</Strategy>
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<BlockFileSet Type="BlockSrcs" Name="test_axi_v1_0_bfm_1_slave_0_0"/>
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<BlockFileSet Type="BlockSrcs" Name="test_axi_v1_0_bfm_1_test_axi_0_0"/>
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<BlockFileSet Type="BlockSrcs" Name="design_1_processing_system7_0_0"/>
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<BlockFileSet Type="BlockSrcs" Name="design_1_axi_pwm_v1_0_S00_AXI_0_0"/>
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</GenRun>
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