2023-03-18 02:00:05 +08:00
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X(TRELLIS_SLICE)
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2020-11-24 00:20:39 +08:00
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X(A0)
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X(B0)
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X(C0)
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X(D0)
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X(A1)
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X(B1)
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X(C1)
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X(D1)
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X(M0)
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X(M1)
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X(FCI)
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X(FXA)
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X(FXB)
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X(CLK)
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X(LSR)
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X(CE)
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2023-03-28 01:40:55 +08:00
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X(CEA)
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X(CEW)
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2020-11-24 00:20:39 +08:00
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X(DI0)
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X(DI1)
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X(WD0)
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X(WD1)
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X(WAD0)
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X(WAD1)
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X(WAD2)
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X(WAD3)
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X(WRE)
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X(WCK)
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X(F0)
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X(Q0)
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X(F1)
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X(Q1)
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X(FCO)
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X(OFX0)
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X(OFX1)
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X(WDO0)
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X(WDO1)
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X(WDO2)
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X(WDO3)
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X(WADO0)
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X(WADO1)
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X(WADO2)
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X(WADO3)
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X(MODE)
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X(GSR)
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X(SRMODE)
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X(CEMUX)
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X(CLKMUX)
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X(LSRMUX)
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X(LSRONMUX)
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X(LUT0_INITVAL)
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X(LUT1_INITVAL)
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2021-02-01 12:29:04 +08:00
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X(REGMODE)
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2020-11-24 00:20:39 +08:00
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X(REG0_SD)
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X(REG1_SD)
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X(REG0_REGSET)
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X(REG1_REGSET)
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X(CCU2_INJECT1_0)
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X(CCU2_INJECT1_1)
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X(WREMUX)
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2023-03-18 02:00:05 +08:00
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X(TRELLIS_FF)
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2020-11-24 00:20:39 +08:00
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X(DI)
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X(Q)
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X(REGSET)
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2023-03-18 02:00:05 +08:00
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X(TRELLIS_IO)
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2020-11-24 00:20:39 +08:00
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X(I)
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X(EN)
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X(O)
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X(DIR)
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X(LUT4)
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X(A)
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X(B)
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X(C)
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X(D)
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X(Z)
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X(INIT)
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X(PFUMX)
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X(ALUT)
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X(BLUT)
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X(L6MUX21)
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X(SD)
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2020-12-04 11:36:38 +08:00
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X(T)
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X(IOLDO)
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X(IOLTO)
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X(OSCH)
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X(OSC)
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X(SEDSTDBY)
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X(DCCA)
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X(CLKI)
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X(CLKO)
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X(DCMA)
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X(CLK0)
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X(CLK1)
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X(SEL)
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X(DCMOUT)
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2022-02-17 01:09:54 +08:00
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X(BEL)
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X(GND)
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X(IO_TYPE)
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X(LOC)
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X(NOM_FREQ)
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X(VCC)
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2023-03-10 22:29:59 +08:00
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X(WIRE_TYPE_NONE)
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2023-03-30 21:24:53 +08:00
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X(TILE_WIRE_ID)
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2023-03-10 22:29:59 +08:00
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2022-02-17 01:09:54 +08:00
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X(machxo2)
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X(pack)
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X(place)
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X(placer)
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X(route)
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X(router)
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2023-03-28 01:40:55 +08:00
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X(TRELLIS_COMB)
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X(TRELLIS_RAMW)
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X(WD)
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X(OFX)
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X(F)
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X(M)
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2023-03-31 20:37:01 +08:00
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X(CCU2D)
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2023-03-28 01:40:55 +08:00
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X(CCU2_INJECT1)
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X(INJECT1_0)
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X(INJECT1_1)
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X(TRELLIS_DPR16X4)
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X(INITVAL)
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X(INIT0)
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X(INIT1)
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X(DATAMUX_ODDR)
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X(DATAMUX_MDDR)
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X(CIN)
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X(S0)
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X(S1)
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X(COUT)
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X(E)
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X(Y)
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2023-04-10 16:18:18 +08:00
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X(WCKMUX)
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X(EHXPLLJ)
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X(CLKFB)
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X(PHASESEL1)
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X(PHASESEL0)
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X(PHASEDIR)
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X(PHASESTEP)
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X(LOADREG)
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X(STDBY)
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X(PLLWAKESYNC)
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X(RST)
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X(ENCLKOP)
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X(ENCLKOS)
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X(ENCLKOS2)
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X(ENCLKOS3)
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X(CLKOP)
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X(CLKOS)
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X(CLKOS2)
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X(CLKOS3)
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X(LOCK)
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X(INTLOCK)
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X(REFCLK)
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X(CLKINTFB)
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X(DP8KC)
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X(DIA0)
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X(DIA1)
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X(DIA2)
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X(DIA3)
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X(DIA4)
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X(DIA5)
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X(DIA6)
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X(DIA7)
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X(DIA8)
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X(ADA0)
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X(ADA1)
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X(ADA2)
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X(ADA3)
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X(ADA4)
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X(ADA5)
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X(ADA6)
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X(ADA7)
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X(ADA8)
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X(ADA9)
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X(ADA10)
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X(ADA11)
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X(ADA12)
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X(OCEA)
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X(CLKA)
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X(WEA)
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X(CSA2)
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X(CSA1)
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X(CSA0)
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X(RSTA)
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X(DIB0)
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X(DIB1)
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X(DIB2)
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X(DIB3)
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X(DIB4)
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X(DIB5)
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X(DIB6)
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X(DIB7)
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X(DIB8)
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X(ADB0)
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X(ADB1)
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X(ADB2)
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X(ADB3)
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X(ADB4)
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X(ADB5)
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X(ADB6)
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X(ADB7)
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X(ADB8)
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X(ADB9)
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X(ADB10)
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X(ADB11)
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X(ADB12)
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X(CEB)
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X(OCEB)
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X(CLKB)
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X(WEB)
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X(CSB2)
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X(CSB1)
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X(CSB0)
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X(RSTB)
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X(DOA0)
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X(DOA1)
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X(DOA2)
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X(DOA3)
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X(DOA4)
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X(DOA5)
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X(DOA6)
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X(DOA7)
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X(DOA8)
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X(DOB0)
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X(DOB1)
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X(DOB2)
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X(DOB3)
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X(DOB4)
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X(DOB5)
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X(DOB6)
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X(DOB7)
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X(DOB8)
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X(AE)
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X(AF)
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X(EF)
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X(FF)
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X(WID)
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X(CLKI_DIV)
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X(CLKFB_DIV)
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X(CLKOP_DIV)
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X(CLKOS_DIV)
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X(CLKOS2_DIV)
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X(CLKOS3_DIV)
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X(CLOCK_ENABLE_PORTS)
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X(CLKOP_ENABLE)
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X(CLKOS_ENABLE)
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X(CLKOS2_ENABLE)
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X(CLKOS3_ENABLE)
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X(VCO_BYPASS_A0)
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X(VCO_BYPASS_B0)
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X(VCO_BYPASS_C0)
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X(VCO_BYPASS_D0)
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X(CLKOP_CPHASE)
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X(CLKOS_CPHASE)
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X(CLKOS2_CPHASE)
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X(CLKOS3_CPHASE)
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X(CLKOP_FPHASE)
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X(CLKOS_FPHASE)
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X(CLKOS2_FPHASE)
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X(CLKOS3_FPHASE)
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X(FEEDBK_PATH)
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X(KVCO)
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X(LPF_CAPACITOR)
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X(LPF_RESISTOR)
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X(ICP_CURRENT)
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X(FRACN_ENABLE)
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X(FRACN_DIV)
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X(FRACN_ORDER)
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X(CLKOP_TRIM_POL)
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X(CLKOP_TRIM_DELAY)
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X(CLKOS_TRIM_POL)
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X(CLKOS_TRIM_DELAY)
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X(PLL_EXPERT)
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X(PLL_USE_WB)
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X(PREDIVIDER_MUXA1)
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X(PREDIVIDER_MUXB1)
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X(PREDIVIDER_MUXC1)
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X(PREDIVIDER_MUXD1)
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X(OUTDIVIDER_MUXA2)
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X(OUTDIVIDER_MUXB2)
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X(OUTDIVIDER_MUXC2)
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X(OUTDIVIDER_MUXD2)
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X(FREQ_LOCK_ACCURACY)
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X(PLL_LOCK_MODE)
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X(PLL_LOCK_DELAY)
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X(GMC_GAIN)
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X(GMC_TEST)
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X(MFG1_TEST)
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X(MFG2_TEST)
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X(MFG_FORCE_VFILTER)
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X(MFG_ICP_TEST)
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X(MFG_EN_UP)
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X(MFG_FLOAT_ICP)
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X(MFG_GMC_PRESET)
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X(MFG_LF_PRESET)
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X(MFG_GMC_RESET)
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X(MFG_LF_RESET)
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X(MFG_LF_RESGRND)
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X(MFG_GMCREF_SEL)
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X(MFG_ENABLE_FILTEROPAMP)
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X(STDBY_ENABLE)
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X(REFIN_RESET)
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X(SYNC_ENABLE)
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X(INT_LOCK_STICKY)
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X(DPHASE_SOURCE)
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X(INTFB_WAKE)
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X(PLLRST_ENA)
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X(MRST_ENA)
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X(DCRST_ENA)
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X(DDRST_ENA)
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X(DATA_WIDTH_A)
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X(DATA_WIDTH_B)
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X(WRITEMODE_A)
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X(WRITEMODE_B)
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X(CSDECODE_A)
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X(CSDECODE_B)
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X(REGMODE_A)
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X(REGMODE_B)
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X(RESETMODE)
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X(ASYNC_RESET_RELEASE)
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X(RSTAMUX)
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X(RSTBMUX)
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X(WEAMUX)
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X(WEBMUX)
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