85 lines
2.8 KiB
C++
85 lines
2.8 KiB
C++
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/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2021 gatecat <gatecat@ds0.me>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include "log.h"
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#include "nextpnr.h"
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#include "util.h"
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NEXTPNR_NAMESPACE_BEGIN
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namespace {
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struct MistralBitgen
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{
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MistralBitgen(Context *ctx) : ctx(ctx), cv(ctx->cyclonev){};
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Context *ctx;
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CycloneV *cv;
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void init()
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{
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ctx->init_base_bitstream();
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// Default options
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cv->opt_b_set(CycloneV::ALLOW_DEVICE_WIDE_OUTPUT_ENABLE_DIS, true);
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cv->opt_n_set(CycloneV::CRC_DIVIDE_ORDER, 8);
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cv->opt_b_set(CycloneV::CVP_CONF_DONE_EN, true);
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cv->opt_b_set(CycloneV::DEVICE_WIDE_RESET_EN, true);
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cv->opt_n_set(CycloneV::DRIVE_STRENGTH, 8);
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cv->opt_b_set(CycloneV::IOCSR_READY_FROM_CSR_DONE_EN, true);
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cv->opt_b_set(CycloneV::NCEO_DIS, true);
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cv->opt_b_set(CycloneV::OCT_DONE_DIS, true);
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cv->opt_r_set(CycloneV::OPT_A, 0x1dff);
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cv->opt_r_set(CycloneV::OPT_B, 0xffffff402dffffffULL);
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cv->opt_b_set(CycloneV::RELEASE_CLEARS_BEFORE_TRISTATES_DIS, true);
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cv->opt_b_set(CycloneV::RETRY_CONFIG_ON_ERROR_EN, true);
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cv->opt_r_set(CycloneV::START_UP_CLOCK, 0x3F);
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}
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void write_routing()
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{
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for (auto net : sorted(ctx->nets)) {
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NetInfo *ni = net.second;
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for (auto wire : sorted_ref(ni->wires)) {
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PipId pip = wire.second.pip;
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if (pip == PipId())
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continue;
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WireId src = ctx->getPipSrcWire(pip), dst = ctx->getPipDstWire(pip);
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// Only write out routes that are entirely in the Mistral domain. Everything else is dealt with
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// specially
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if (src.is_nextpnr_created() || dst.is_nextpnr_created())
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continue;
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cv->rnode_link(src.node, dst.node);
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}
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}
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}
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void run()
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{
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cv->clear();
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init();
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write_routing();
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}
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};
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} // namespace
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void Arch::build_bitstream()
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{
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MistralBitgen gen(getCtx());
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gen.run();
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}
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NEXTPNR_NAMESPACE_END
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