16 lines
299 B
Tcl
16 lines
299 B
Tcl
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yosys -import
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read_verilog $::env(SOURCES)
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synth_nexus -nolutram -nowidelut -noccu2 -nodsp
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techmap -max_iter 1 -map $::env(TECHMAP)
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# opt_expr -undriven makes sure all nets are driven, if only by the $undef
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# net.
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opt_expr -undriven
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opt_clean
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setundef -zero -params
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write_json $::env(OUT_JSON)
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