387 lines
11 KiB
C++
387 lines
11 KiB
C++
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/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include <algorithm>
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#include <cmath>
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#include "log.h"
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#include "nextpnr.h"
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#include "util.h"
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NEXTPNR_NAMESPACE_BEGIN
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// -----------------------------------------------------------------------
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IdString Arch::belTypeToId(BelType type) const
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{
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if (type == TYPE_ICESTORM_LC)
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return id("ICESTORM_LC");
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if (type == TYPE_ICESTORM_RAM)
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return id("ICESTORM_RAM");
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if (type == TYPE_SB_IO)
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return id("SB_IO");
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if (type == TYPE_SB_GB)
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return id("SB_GB");
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if (type == TYPE_ICESTORM_PLL)
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return id("ICESTORM_PLL");
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if (type == TYPE_SB_WARMBOOT)
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return id("SB_WARMBOOT");
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if (type == TYPE_SB_MAC16)
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return id("SB_MAC16");
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if (type == TYPE_ICESTORM_HFOSC)
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return id("ICESTORM_HFOSC");
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if (type == TYPE_ICESTORM_LFOSC)
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return id("ICESTORM_LFOSC");
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if (type == TYPE_SB_I2C)
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return id("SB_I2C");
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if (type == TYPE_SB_SPI)
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return id("SB_SPI");
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if (type == TYPE_IO_I3C)
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return id("IO_I3C");
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if (type == TYPE_SB_LEDDA_IP)
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return id("SB_LEDDA_IP");
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if (type == TYPE_SB_RGBA_DRV)
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return id("SB_RGBA_DRV");
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if (type == TYPE_ICESTORM_SPRAM)
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return id("ICESTORM_SPRAM");
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return IdString();
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}
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BelType Arch::belTypeFromId(IdString type) const
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{
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if (type == id("ICESTORM_LC"))
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return TYPE_ICESTORM_LC;
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if (type == id("ICESTORM_RAM"))
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return TYPE_ICESTORM_RAM;
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if (type == id("SB_IO"))
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return TYPE_SB_IO;
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if (type == id("SB_GB"))
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return TYPE_SB_GB;
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if (type == id("ICESTORM_PLL"))
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return TYPE_ICESTORM_PLL;
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if (type == id("SB_WARMBOOT"))
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return TYPE_SB_WARMBOOT;
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if (type == id("SB_MAC16"))
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return TYPE_SB_MAC16;
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if (type == id("ICESTORM_HFOSC"))
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return TYPE_ICESTORM_HFOSC;
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if (type == id("ICESTORM_LFOSC"))
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return TYPE_ICESTORM_LFOSC;
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if (type == id("SB_I2C"))
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return TYPE_SB_I2C;
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if (type == id("SB_SPI"))
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return TYPE_SB_SPI;
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if (type == id("IO_I3C"))
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return TYPE_IO_I3C;
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if (type == id("SB_LEDDA_IP"))
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return TYPE_SB_LEDDA_IP;
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if (type == id("SB_RGBA_DRV"))
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return TYPE_SB_RGBA_DRV;
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if (type == id("ICESTORM_SPRAM"))
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return TYPE_ICESTORM_SPRAM;
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return TYPE_NONE;
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}
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// -----------------------------------------------------------------------
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void IdString::initialize_arch(const BaseCtx *ctx)
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{
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#define X(t) initialize_add(ctx, #t, PIN_##t);
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#include "portpins.inc"
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#undef X
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}
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IdString Arch::portPinToId(PortPin type) const
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{
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IdString ret;
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if (type > 0 && type < PIN_MAXIDX)
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ret.index = type;
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return ret;
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}
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PortPin Arch::portPinFromId(IdString type) const
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{
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if (type.index > 0 && type.index < PIN_MAXIDX)
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return PortPin(type.index);
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return PIN_NONE;
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}
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// -----------------------------------------------------------------------
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static const ChipInfoPOD *get_chip_info(const RelPtr<ChipInfoPOD> *ptr) { return ptr->get(); }
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#if defined(_MSC_VER)
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void load_chipdb();
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#endif
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Arch::Arch(ArchArgs args) : args(args)
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{
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#if defined(_MSC_VER)
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load_chipdb();
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#endif
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#ifdef ICE40_HX1K_ONLY
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if (args.type == ArchArgs::HX1K) {
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chip_info = get_chip_info(reinterpret_cast<const RelPtr<ChipInfoPOD> *>(chipdb_blob_1k));
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} else {
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log_error("Unsupported iCE40 chip type.\n");
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}
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#else
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if (args.type == ArchArgs::LP384) {
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chip_info = get_chip_info(reinterpret_cast<const RelPtr<ChipInfoPOD> *>(chipdb_blob_384));
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} else if (args.type == ArchArgs::LP1K || args.type == ArchArgs::HX1K) {
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chip_info = get_chip_info(reinterpret_cast<const RelPtr<ChipInfoPOD> *>(chipdb_blob_1k));
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} else if (args.type == ArchArgs::UP5K) {
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chip_info = get_chip_info(reinterpret_cast<const RelPtr<ChipInfoPOD> *>(chipdb_blob_5k));
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} else if (args.type == ArchArgs::LP8K || args.type == ArchArgs::HX8K) {
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chip_info = get_chip_info(reinterpret_cast<const RelPtr<ChipInfoPOD> *>(chipdb_blob_8k));
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} else {
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log_error("Unsupported iCE40 chip type.\n");
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}
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#endif
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package_info = nullptr;
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for (int i = 0; i < chip_info->num_packages; i++) {
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if (chip_info->packages_data[i].name.get() == args.package) {
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package_info = &(chip_info->packages_data[i]);
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break;
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}
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}
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if (package_info == nullptr)
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log_error("Unsupported package '%s'.\n", args.package.c_str());
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bel_to_cell.resize(chip_info->num_bels);
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wire_to_net.resize(chip_info->num_wires);
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pip_to_net.resize(chip_info->num_pips);
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switches_locked.resize(chip_info->num_switches);
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// Initialise regularly used IDStrings for performance
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id_glb_buf_out = id("GLOBAL_BUFFER_OUTPUT");
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id_icestorm_lc = id("ICESTORM_LC");
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id_sb_io = id("SB_IO");
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id_sb_gb = id("SB_GB");
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id_cen = id("CEN");
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id_clk = id("CLK");
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id_sr = id("SR");
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id_i0 = id("I0");
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id_i1 = id("I1");
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id_i2 = id("I2");
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id_i3 = id("I3");
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id_dff_en = id("DFF_ENABLE");
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id_neg_clk = id("NEG_CLK");
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}
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// -----------------------------------------------------------------------
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std::string Arch::getChipName()
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{
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#ifdef ICE40_HX1K_ONLY
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if (args.type == ArchArgs::HX1K) {
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return "Lattice LP1K";
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} else {
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log_error("Unsupported iCE40 chip type.\n");
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}
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#else
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if (args.type == ArchArgs::LP384) {
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return "Lattice LP384";
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} else if (args.type == ArchArgs::LP1K) {
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return "Lattice LP1K";
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} else if (args.type == ArchArgs::HX1K) {
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return "Lattice HX1K";
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} else if (args.type == ArchArgs::UP5K) {
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return "Lattice UP5K";
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} else if (args.type == ArchArgs::LP8K) {
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return "Lattice LP8K";
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} else if (args.type == ArchArgs::HX8K) {
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return "Lattice HX8K";
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} else {
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log_error("Unknown chip\n");
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}
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#endif
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}
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// -----------------------------------------------------------------------
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IdString Arch::archArgsToId(ArchArgs args) const
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{
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if (args.type == ArchArgs::LP384)
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return id("lp384");
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if (args.type == ArchArgs::LP1K)
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return id("lp1k");
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if (args.type == ArchArgs::HX1K)
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return id("hx1k");
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if (args.type == ArchArgs::UP5K)
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return id("up5k");
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if (args.type == ArchArgs::LP8K)
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return id("lp8k");
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if (args.type == ArchArgs::HX8K)
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return id("hx8k");
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return IdString();
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}
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// -----------------------------------------------------------------------
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BelId Arch::getBelByName(IdString name) const
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{
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BelId ret;
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if (bel_by_name.empty()) {
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for (int i = 0; i < chip_info->num_bels; i++)
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bel_by_name[id(chip_info->bel_data[i].name.get())] = i;
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}
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auto it = bel_by_name.find(name);
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if (it != bel_by_name.end())
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ret.index = it->second;
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return ret;
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}
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BelRange Arch::getBelsAtSameTile(BelId bel) const
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{
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BelRange br;
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NPNR_ASSERT(bel != BelId());
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// This requires Bels at the same tile are consecutive
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int x = chip_info->bel_data[bel.index].x;
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int y = chip_info->bel_data[bel.index].y;
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int start = bel.index, end = bel.index;
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while (start >= 0 && chip_info->bel_data[start].x == x && chip_info->bel_data[start].y == y)
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start--;
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start++;
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br.b.cursor = start;
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while (end < chip_info->num_bels && chip_info->bel_data[end].x == x && chip_info->bel_data[end].y == y)
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end++;
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br.e.cursor = end;
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return br;
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}
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WireId Arch::getWireBelPin(BelId bel, PortPin pin) const
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{
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WireId ret;
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NPNR_ASSERT(bel != BelId());
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int num_bel_wires = chip_info->bel_data[bel.index].num_bel_wires;
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const BelWirePOD *bel_wires = chip_info->bel_data[bel.index].bel_wires.get();
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for (int i = 0; i < num_bel_wires; i++)
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if (bel_wires[i].port == pin) {
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ret.index = bel_wires[i].wire_index;
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break;
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}
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return ret;
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}
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// -----------------------------------------------------------------------
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WireId Arch::getWireByName(IdString name) const
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{
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WireId ret;
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if (wire_by_name.empty()) {
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for (int i = 0; i < chip_info->num_wires; i++)
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wire_by_name[id(chip_info->wire_data[i].name.get())] = i;
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}
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auto it = wire_by_name.find(name);
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if (it != wire_by_name.end())
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ret.index = it->second;
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return ret;
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}
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// -----------------------------------------------------------------------
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PipId Arch::getPipByName(IdString name) const
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{
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PipId ret;
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if (pip_by_name.empty()) {
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for (int i = 0; i < chip_info->num_pips; i++) {
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PipId pip;
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pip.index = i;
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pip_by_name[getPipName(pip)] = i;
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}
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}
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auto it = pip_by_name.find(name);
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if (it != pip_by_name.end())
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ret.index = it->second;
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return ret;
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}
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IdString Arch::getPipName(PipId pip) const
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{
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NPNR_ASSERT(pip != PipId());
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int x = chip_info->pip_data[pip.index].x;
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int y = chip_info->pip_data[pip.index].y;
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std::string src_name = chip_info->wire_data[chip_info->pip_data[pip.index].src].name.get();
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std::replace(src_name.begin(), src_name.end(), '/', '.');
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std::string dst_name = chip_info->wire_data[chip_info->pip_data[pip.index].dst].name.get();
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std::replace(dst_name.begin(), dst_name.end(), '/', '.');
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return id("X" + std::to_string(x) + "/Y" + std::to_string(y) + "/" + src_name + ".->." + dst_name);
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}
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// -----------------------------------------------------------------------
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BelId Arch::getPackagePinBel(const std::string &pin) const { return BelId(); }
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std::string Arch::getBelPackagePin(BelId bel) const { return ""; }
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// -----------------------------------------------------------------------
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void Arch::estimatePosition(BelId bel, int &x, int &y, bool &gb) const {}
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delay_t Arch::estimateDelay(WireId src, WireId dst) const { return 1; }
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// -----------------------------------------------------------------------
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std::vector<GraphicElement> Arch::getFrameGraphics() const
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{
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std::vector<GraphicElement> ret;
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return ret;
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}
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|
||
|
|
std::vector<GraphicElement> Arch::getBelGraphics(BelId bel) const
|
||
|
|
{
|
||
|
|
std::vector<GraphicElement> ret;
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
std::vector<GraphicElement> Arch::getWireGraphics(WireId wire) const
|
||
|
|
{
|
||
|
|
std::vector<GraphicElement> ret;
|
||
|
|
// FIXME
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
std::vector<GraphicElement> Arch::getPipGraphics(PipId pip) const
|
||
|
|
{
|
||
|
|
std::vector<GraphicElement> ret;
|
||
|
|
// FIXME
|
||
|
|
return ret;
|
||
|
|
};
|
||
|
|
|
||
|
|
NEXTPNR_NAMESPACE_END
|