2019-04-02 03:16:29 +08:00
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# Generic Architecture Example
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This contains a simple, artificial, example of the nextpnr generic API.
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- simple.py procedurally generates a simple FPGA architecture with IO at the edges,
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logic slices in all other tiles, and interconnect only between adjacent tiles
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2019-04-04 23:30:47 +08:00
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- simple_timing.py annotates cells with timing data (this is a separate script that must be run after packing)
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2019-04-02 03:16:29 +08:00
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2019-04-17 18:00:23 +08:00
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- write_fasm.py uses the nextpnr Python API to write a FASM file for a design
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- bitstream.py uses write_fasm.py to create a FASM ("FPGA assembly") file for the place-and-routed design
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2019-04-02 03:16:29 +08:00
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2019-04-04 22:40:48 +08:00
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- Run simple.sh to build an example design on the FPGA above
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