2024-12-18 15:56:54 +08:00
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/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2024 The Project Peppercorn Authors.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include "pack.h"
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#define HIMBAECHEL_CONSTIDS "uarch/gatemate/constids.inc"
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#include "himbaechel_constids.h"
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NEXTPNR_NAMESPACE_BEGIN
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2024-12-20 16:38:14 +08:00
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void GateMatePacker::disconnect_if_gnd(CellInfo *cell, IdString input)
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{
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NetInfo *net = cell->getPort(input);
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if (!net)
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return;
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if (net->name.in(ctx->id("$PACKER_GND"))) {
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cell->disconnectPort(input);
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}
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}
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2024-12-18 15:56:54 +08:00
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void GateMatePacker::pack_io()
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{
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// Trim nextpnr IOBs - assume IO buffer insertion has been done in synthesis
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for (auto &port : ctx->ports) {
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if (!ctx->cells.count(port.first))
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log_error("Port '%s' doesn't seem to have a corresponding top level IO\n", ctx->nameOf(port.first));
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CellInfo *ci = ctx->cells.at(port.first).get();
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PortRef top_port;
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top_port.cell = nullptr;
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bool is_npnr_iob = false;
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if (ci->type == ctx->id("$nextpnr_ibuf") || ci->type == ctx->id("$nextpnr_iobuf")) {
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// Might have an input buffer connected to it
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is_npnr_iob = true;
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NetInfo *o = ci->getPort(id_O);
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if (o == nullptr)
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;
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else if (o->users.entries() > 1)
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log_error("Top level pin '%s' has multiple input buffers\n", ctx->nameOf(port.first));
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else if (o->users.entries() == 1)
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top_port = *o->users.begin();
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}
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if (ci->type == ctx->id("$nextpnr_obuf") || ci->type == ctx->id("$nextpnr_iobuf")) {
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// Might have an output buffer connected to it
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is_npnr_iob = true;
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NetInfo *i = ci->getPort(id_I);
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if (i != nullptr && i->driver.cell != nullptr) {
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if (top_port.cell != nullptr)
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log_error("Top level pin '%s' has multiple input/output buffers\n", ctx->nameOf(port.first));
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top_port = i->driver;
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}
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// Edge case of a bidirectional buffer driving an output pin
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if (i->users.entries() > 2) {
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log_error("Top level pin '%s' has illegal buffer configuration\n", ctx->nameOf(port.first));
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} else if (i->users.entries() == 2) {
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if (top_port.cell != nullptr)
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log_error("Top level pin '%s' has illegal buffer configuration\n", ctx->nameOf(port.first));
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for (auto &usr : i->users) {
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if (usr.cell->type == ctx->id("$nextpnr_obuf") || usr.cell->type == ctx->id("$nextpnr_iobuf"))
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continue;
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top_port = usr;
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break;
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}
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}
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}
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if (!is_npnr_iob)
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log_error("Port '%s' doesn't seem to have a corresponding top level IO (internal cell type mismatch)\n",
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ctx->nameOf(port.first));
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if (top_port.cell == nullptr) {
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log_info("Trimming port '%s' as it is unused.\n", ctx->nameOf(port.first));
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} else {
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// Copy attributes to real IO buffer
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for (auto &attrs : ci->attrs)
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top_port.cell->attrs[attrs.first] = attrs.second;
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2024-12-20 16:38:14 +08:00
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for (auto ¶ms : ci->params) {
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if (top_port.cell->params.count(params.first)) {
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if (top_port.cell->params[params.first] != params.second) {
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log_warning("Overriding parameter '%s' with value '%s' for cell '%s'.\n",
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params.first.c_str(ctx), params.second.c_str(), ctx->nameOf(top_port.cell));
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}
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}
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2024-12-18 15:56:54 +08:00
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top_port.cell->params[params.first] = params.second;
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2024-12-20 16:38:14 +08:00
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}
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2024-12-18 15:56:54 +08:00
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// Make sure that top level net is set correctly
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port.second.net = top_port.cell->ports.at(top_port.port).net;
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}
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// Now remove the nextpnr-inserted buffer
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ci->disconnectPort(id_I);
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ci->disconnectPort(id_O);
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ctx->cells.erase(port.first);
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}
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for (auto &cell : ctx->cells) {
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CellInfo &ci = *cell.second;
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2024-12-20 16:38:14 +08:00
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if (!ci.type.in(id_CC_IBUF, id_CC_OBUF, id_CC_TOBUF, id_CC_IOBUF))
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2024-12-18 15:56:54 +08:00
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continue;
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std::string loc;
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2024-12-20 16:38:14 +08:00
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if (ci.params.count(ctx->id("PIN_NAME")) == 0) {
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2024-12-18 15:56:54 +08:00
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log_warning("IO signal name '%s' is not defined in CCF file and will be auto-placed.\n", ctx->nameOf(&ci));
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} else {
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2024-12-20 16:38:14 +08:00
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loc = ci.params.at(ctx->id("PIN_NAME")).to_string();
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}
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disconnect_if_gnd(&ci, id_T);
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if (ci.type == id_CC_TOBUF && !ci.getPort(id_T))
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ci.type = id_CC_OBUF;
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std::vector<IdString> keys;
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for (auto &p : ci.params) {
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if (p.first.in(id_PIN_NAME, id_V_IO)) {
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keys.push_back(p.first);
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continue;
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}
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if (ci.type.in(id_CC_IBUF, id_CC_IOBUF) &&
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p.first.in(id_PULLUP, id_PULLDOWN, id_KEEPER, id_SCHMITT_TRIGGER, id_DELAY_IBF, id_FF_IBF))
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continue;
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if (ci.type.in(id_CC_TOBUF) && p.first.in(id_PULLUP, id_PULLDOWN, id_KEEPER))
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continue;
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if (ci.type.in(id_CC_OBUF, id_CC_TOBUF, id_CC_IOBUF) &&
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p.first.in(id_DRIVE, id_SLEW, id_DELAY_OBF, id_FF_OBF))
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continue;
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log_warning("Removing unsupported parameter '%s' for type '%s'.\n", p.first.c_str(ctx), ci.type.c_str(ctx));
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keys.push_back(p.first);
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2024-12-18 15:56:54 +08:00
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}
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2024-12-20 16:38:14 +08:00
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for (auto key : keys)
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ci.params.erase(key);
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2024-12-18 15:56:54 +08:00
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2024-12-20 16:38:14 +08:00
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if ((ci.params.count(id_KEEPER) + ci.params.count(id_PULLUP) + ci.params.count(id_PULLDOWN)) > 1)
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log_error("PULLUP, PULLDOWN and KEEPER are mutually exclusive parameters.\n");
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// DELAY_IBF and DELAY_OBF must be set depending of type
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// Also we need to enable input/output
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if (ci.type.in(id_CC_IBUF, id_CC_IOBUF)) {
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ci.params[id_DELAY_IBF] = Property(1 << int_or_default(ci.params, id_DELAY_IBF, 0), 16);
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ci.params[id_INPUT_ENABLE] = Property(Property::State::S1);
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2024-12-18 15:56:54 +08:00
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}
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2024-12-20 16:38:14 +08:00
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if (ci.type.in(id_CC_OBUF, id_CC_TOBUF, id_CC_IOBUF)) {
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ci.params[id_DELAY_OBF] = Property(1 << int_or_default(ci.params, id_DELAY_OBF, 0), 16);
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ci.params[id_OE_ENABLE] = Property(Property::State::S1);
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}
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// Disconnect PADs
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ci.disconnectPort(id_IO);
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ci.disconnectPort(id_I);
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ci.disconnectPort(id_O);
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// Remap ports to GPIO bel
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ci.renamePort(id_A, id_DO);
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ci.renamePort(id_Y, id_DI);
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ci.renamePort(id_T, id_OE);
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NetInfo *do_net = ci.getPort(id_DO);
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if (do_net) {
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if (do_net->name.in(ctx->id("$PACKER_GND"), ctx->id("$PACKER_VCC"))) {
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ci.params[id_OUT23_14_SEL] =
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Property(do_net->name == ctx->id("$PACKER_VCC") ? Property::State::S1 : Property::State::S0);
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ci.disconnectPort(id_DO);
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} else {
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ci.params[id_OUT_SIGNAL] = Property(Property::State::S1);
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}
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2024-12-18 15:56:54 +08:00
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}
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if (!loc.empty()) {
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BelId bel = ctx->get_package_pin_bel(ctx->id(loc));
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if (bel == BelId())
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log_error("Unable to constrain IO '%s', device does not have a pin named '%s'\n", ci.name.c_str(ctx),
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loc.c_str());
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log_info(" Constraining '%s' to pad '%s'\n", ci.name.c_str(ctx), loc.c_str());
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ctx->bindBel(bel, &ci, PlaceStrength::STRENGTH_FIXED);
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}
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}
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}
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2024-12-20 16:38:14 +08:00
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void GateMatePacker::pack_constants()
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{
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log_info("Packing constants..\n");
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// Replace constants with LUTs
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const dict<IdString, Property> vcc_params = {
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{id_INIT_L00, Property(0xf, 4)}, {id_INIT_L01, Property(0xf, 4)}, {id_INIT_L02, Property(0xf, 4)}};
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const dict<IdString, Property> gnd_params = {
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{id_INIT_L00, Property(0x0, 4)}, {id_INIT_L01, Property(0x0, 4)}, {id_INIT_L02, Property(0x0, 4)}};
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h.replace_constants(CellTypePort(id_CPE, id_OUT1), CellTypePort(id_CPE, id_OUT1), vcc_params, gnd_params);
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}
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void GateMatePacker::remove_constants()
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{
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log_info("Removing constants..\n");
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auto fnd_cell = ctx->cells.find(ctx->id("$PACKER_VCC_DRV"));
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if (fnd_cell != ctx->cells.end()) {
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auto fnd_net = ctx->nets.find(ctx->id("$PACKER_VCC"));
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if (fnd_net != ctx->nets.end() && fnd_net->second->users.entries() == 0) {
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BelId bel = (*fnd_cell).second.get()->bel;
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if (bel != BelId())
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ctx->unbindBel(bel);
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ctx->cells.erase(fnd_cell);
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ctx->nets.erase(fnd_net);
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log_info(" Removed unused VCC cell\n");
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}
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}
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fnd_cell = ctx->cells.find(ctx->id("$PACKER_GND_DRV"));
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if (fnd_cell != ctx->cells.end()) {
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auto fnd_net = ctx->nets.find(ctx->id("$PACKER_GND"));
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if (fnd_net != ctx->nets.end() && fnd_net->second->users.entries() == 0) {
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BelId bel = (*fnd_cell).second.get()->bel;
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if (bel != BelId())
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ctx->unbindBel(bel);
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ctx->cells.erase(fnd_cell);
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ctx->nets.erase(fnd_net);
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log_info(" Removed unused GND cell\n");
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}
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}
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}
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2024-12-18 15:56:54 +08:00
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void GateMateImpl::pack()
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{
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const ArchArgs &args = ctx->args;
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if (args.options.count("ccf")) {
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parse_ccf(args.options.at("ccf"));
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}
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GateMatePacker packer(ctx, this);
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2024-12-20 16:38:14 +08:00
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packer.pack_constants();
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2024-12-18 15:56:54 +08:00
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packer.pack_io();
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2024-12-20 16:38:14 +08:00
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packer.remove_constants();
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2024-12-18 15:56:54 +08:00
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}
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NEXTPNR_NAMESPACE_END
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