2021-02-12 06:24:49 +08:00
|
|
|
find_package(TCL)
|
|
|
|
if(NOT ${TCL_FOUND})
|
|
|
|
message(FATAL_ERROR "Tcl is required for FPGA interchange Arch.")
|
|
|
|
endif()
|
|
|
|
|
2021-02-13 08:12:16 +08:00
|
|
|
find_package(ZLIB REQUIRED)
|
|
|
|
|
2021-03-12 19:25:41 +08:00
|
|
|
set(RAPIDWRIGHT_PATH $ENV{HOME}/RapidWright CACHE PATH "Path to RapidWright")
|
2021-03-13 02:02:00 +08:00
|
|
|
set(INVOKE_RAPIDWRIGHT ${RAPIDWRIGHT_PATH}/scripts/invoke_rapidwright.sh CACHE PATH "Path to RapidWright invocation script")
|
2021-03-12 19:25:41 +08:00
|
|
|
# FIXME: Make patch data available in the python package and remove this cached var
|
|
|
|
set(PYTHON_INTERCHANGE_PATH $ENV{HOME}/python-fpga-interchange CACHE PATH "Path to the FPGA interchange python library")
|
|
|
|
set(INTERCHANGE_SCHEMA_PATH $ENV{HOME}/fpga_interchange_schema CACHE PATH "Path to the FPGA interchange schema dir")
|
|
|
|
|
2021-02-16 01:07:23 +08:00
|
|
|
add_subdirectory(3rdparty/fpga-interchange-schema/cmake/cxx_static)
|
2021-03-12 19:25:41 +08:00
|
|
|
include(${family}/examples/chipdb.cmake)
|
|
|
|
include(${family}/examples/tests.cmake)
|
2021-02-13 08:12:16 +08:00
|
|
|
|
2021-02-12 06:24:49 +08:00
|
|
|
foreach (target ${family_targets})
|
2021-02-13 08:12:16 +08:00
|
|
|
target_include_directories(${target} PRIVATE ${TCL_INCLUDE_PATH})
|
|
|
|
target_link_libraries(${target} PRIVATE ${TCL_LIBRARY})
|
|
|
|
target_link_libraries(${target} PRIVATE fpga_interchange_capnp)
|
|
|
|
target_link_libraries(${target} PRIVATE z)
|
2021-02-12 06:24:49 +08:00
|
|
|
endforeach()
|