19 lines
331 B
VHDL
19 lines
331 B
VHDL
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library ieee;
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use ieee.std_logic_1164.all;
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-- We don't have VHDL primitives yet, so declare them in examples for now.
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package components is
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component OSCH
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generic (
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NOM_FREQ : string := "2.08"
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);
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port(
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STDBY : in std_logic;
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OSC : out std_logic;
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SEDSTDBY : out std_logic
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);
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end component;
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end components;
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