Improve archapi doc
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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docs/archapi.md
339
docs/archapi.md
@ -9,7 +9,7 @@ The architecture-specific `archdefs.h` must define the following types.
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With the exception of `ArchNetInfo` and `ArchCellInfo`, the following types should be "lightweight" enough so that passing them by value is sensible.
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With the exception of `ArchNetInfo` and `ArchCellInfo`, the following types should be "lightweight" enough so that passing them by value is sensible.
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### delay_t
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### delay\_t
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A scalar type that is used to represent delays. May be an integer or float type.
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A scalar type that is used to represent delays. May be an integer or float type.
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@ -127,7 +127,7 @@ Get the X/Y/Z location of a given bel.
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Lookup a bel by its X/Y/Z location.
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Lookup a bel by its X/Y/Z location.
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### const_range\<BelId\> getBelsByTile(int x, int y) const
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### const\_range\<BelId\> getBelsByTile(int x, int y) const
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Return a list of all bels at the give X/Y location.
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Return a list of all bels at the give X/Y location.
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@ -135,18 +135,22 @@ Return a list of all bels at the give X/Y location.
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Returns true if the given bel is a global buffer. A global buffer does not "pull in" other cells it drives to be close to the location of the global buffer.
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Returns true if the given bel is a global buffer. A global buffer does not "pull in" other cells it drives to be close to the location of the global buffer.
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### uint32_t getBelChecksum(BelId bel) const
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### uint32\_t getBelChecksum(BelId bel) const
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Return a checksum for the state of a bel. (Used to calculate the design checksum.)
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Return a (preferably unique) number that represents this bel. This is used in design state checksum calculations.
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### void bindBel(BelId bel, IdString cell, PlaceStrength strength)
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### void bindBel(BelId bel, IdString cell, PlaceStrength strength)
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Bind a given bel to a given cell with the given strength.
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Bind a given bel to a given cell with the given strength.
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This method must also update `CellInfo::bel` and `CellInfo::belStrength`.
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### void unbindBel(BelId bel)
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### void unbindBel(BelId bel)
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Unbind a bel.
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Unbind a bel.
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This method must also update `CellInfo::bel` and `CellInfo::belStrength`.
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### bool checkBelAvail(BelId bel) const
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### bool checkBelAvail(BelId bel) const
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Returns true if the bel is available. A bel can be unavailable because it is bound, or because it is exclusive to some other resource that is bound.
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Returns true if the bel is available. A bel can be unavailable because it is bound, or because it is exclusive to some other resource that is bound.
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@ -159,7 +163,7 @@ Return the cell the given bel is bound to, or `IdString()` if the bel is not bou
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If the bel is unavailable, and unbinding a single cell would make it available, then this method must return the name of that cell.
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If the bel is unavailable, and unbinding a single cell would make it available, then this method must return the name of that cell.
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### const_range\<BelId\> getBels() const
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### const\_range\<BelId\> getBels() const
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Return a list of all bels on the device.
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Return a list of all bels on the device.
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@ -175,108 +179,291 @@ Return the wire connected to the given bel pin.
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Return the type (input/output/inout) of the given bel pin.
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Return the type (input/output/inout) of the given bel pin.
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### const_range\<PortPin\> getBelPins(BelId bel) const
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### const\_range\<PortPin\> getBelPins(BelId bel) const
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Return a list of all pins on that bel.
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Return a list of all pins on that bel.
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Wire Methods
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Wire Methods
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------------
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------------
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```
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### WireId getWireByName(IdString name) const
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WireId getWireByName(IdString name) const
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IdString getWireName(WireId wire) const
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Lookup a wire by its name.
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IdString getWireType(WireId wire) const
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uint32_t getWireChecksum(WireId wire) const
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### IdString getWireName(WireId wire) const
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void bindWire(WireId wire, IdString net, PlaceStrength strength)
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void unbindWire(WireId wire)
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Get the name for a wire. (Wire names must be unique.)
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bool checkWireAvail(WireId wire) const
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IdString getBoundWireNet(WireId wire) const
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### IdString getWireType(WireId wire) const
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IdString getConflictingWireNet(WireId wire) const
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DelayInfo getWireDelay(WireId wire) const
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Get the type of a wire. The wire type is purely informal and
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const_range<WireId> getWires() const
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isn't used by any of the core algorithms. Implementations may
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const_range<BelPin> getWireBelPins(WireId wire) const
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simply return `IdString()`.
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```
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### uint32\_t getWireChecksum(WireId wire) const
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Return a (preferably unique) number that represents this wire. This is used in design state checksum calculations.
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### void bindWire(WireId wire, IdString net, PlaceStrength strength)
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Bind a wire to a net. This method must be used when binding a wire that is driven by a bel pin. Use `binPip()`
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when binding a wire that is driven by a pip.
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This method must also update `NetInfo::wires`.
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### void unbindWire(WireId wire)
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Unbind a wire. For wires that are driven by a pip, this will also unbind the driving pip.
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This method must also update `NetInfo::wires`.
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### bool checkWireAvail(WireId wire) const
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Return true if the wire is available, i.e. can be bound to a net.
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### IdString getBoundWireNet(WireId wire) const
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Return the net a wire is bound to.
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### IdString getConflictingWireNet(WireId wire) const
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If this returns a non-empty IdString, then unbinding that net
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will make the given wire available.
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This returns an empty IdString if the wire is already available,
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or if there is no single net that can be unbound to make this
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wire available.
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### DelayInfo getWireDelay(WireId wire) const
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Get the delay for a wire.
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### const\_range\<WireId\> getWires() const
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Get a list of all wires on the device.
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### const\_range\<BelPin\> getWireBelPins(WireId wire) const
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Get a list of all bel pins attached to a given wire.
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Pip Methods
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Pip Methods
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-----------
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-----------
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```
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### PipId getPipByName(IdString name) const
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PipId getPipByName(IdString name) const
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IdString getPipName(PipId pip) const
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Lookup a pip by its name.
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IdString getPipType(PipId pip) const
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uint32_t getPipChecksum(PipId pip) const
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### IdString getPipName(PipId pip) const
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void bindPip(PipId pip, IdString net, PlaceStrength strength)
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void unbindPip(PipId pip)
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Get the name for a pip. (Pip names must be unique.)
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bool checkPipAvail(PipId pip) const
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IdString getBoundPipNet(PipId pip) const
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### IdString getPipType(PipId pip) const
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IdString getConflictingPipNet(PipId pip) const
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const_range<PipId> getPips() const
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Get the type of a pip. Pip types are purely informal and
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WireId getPipSrcWire(PipId pip) const
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implementations may simply return `IdString()`.
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WireId getPipDstWire(PipId pip) const
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DelayInfo getPipDelay(PipId pip) const
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### uint32\_t getPipChecksum(PipId pip) const
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const_range<PipId> getPipsDownhill(WireId wire) const
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const_range<PipId> getPipsUphill(WireId wire) const
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Return a (preferably unique) number that represents this pip. This is used in design state checksum calculations.
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const_range<PipId> getWireAliases(WireId wire) const
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```
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### void bindPip(PipId pip, IdString net, PlaceStrength strength)
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Bid a pip to a net. This also bind the destination wire of that pip.
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This method must also update `NetInfo::wires`.
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### void unbindPip(PipId pip)
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Unbind a pip and the wire driven by that pip.
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This method must also update `NetInfo::wires`.
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### bool checkPipAvail(PipId pip) const
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Returns true if the given pip is available to be bound to a net.
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### IdString getBoundPipNet(PipId pip) const
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Return the net this pip is bound to.
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### IdString getConflictingPipNet(PipId pip) const
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Return the net that needs to be unbound in order to make this
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pip available.
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This does not need to (but may) return the conflicting wire if the conflict is
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limited to the conflicting wire being bound to the destination wire for this
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pip.
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### const\_range\<PipId\> getPips() const
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Return a list of all pips on the device.
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### WireId getPipSrcWire(PipId pip) const
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Get the source wire for a pip.
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### WireId getPipDstWire(PipId pip) const
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Get the destination wire for a pip.
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Bi-directional switches (transfer gates) are modelled using two
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antiparallel pips.
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### DelayInfo getPipDelay(PipId pip) const
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Get the delay for a pip.
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### const\_range\<PipId\> getPipsDownhill(WireId wire) const
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Get all pips downhill of a wire, i.e. pips that use this wire as source wire.
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### const\_range\<PipId\> getPipsUphill(WireId wire) const
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Get all pips uphill of a wire, i.e. pips that use this wire as destination wire.
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### const\_range\<PipId\> getWireAliases(WireId wire) const
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Get all alias pips downhill of a wire.
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There is no api for getting the alias pips uphill of a wire.
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Alias pips come in antiparallel pairs if a signal can be injected on either
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side of the alias pip.
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Group Methods
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Group Methods
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-------------
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-------------
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```
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### GroupId getGroupByName(IdString name) const
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GroupId getGroupByName(IdString name) const
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IdString getGroupName(GroupId group) const
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Lookup a group by its name.
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const_range<GroupId> getGroups() const
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const_range<BelId> getGroupBels(GroupId group) const
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### IdString getGroupName(GroupId group) const
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const_range<WireId> getGroupWires(GroupId group) const
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const_range<PipId> getGroupPips(GroupId group) const
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Get the name for a group. (Group names must be unique.)
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const_range<GroupId> getGroupGroups(GroupId group) const
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```
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### const\_range\<GroupId\> getGroups() const
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Get a list of all groups on the device.
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### const\_range\<BelId\> getGroupBels(GroupId group) const
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Get a list of all bels within a group.
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### const\_range\<WireId\> getGroupWires(GroupId group) const
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Get a list of all wires within a group.
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### const\_range\<PipId\> getGroupPips(GroupId group) const
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Get a list of all pips within a group.
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### const\_range\<GroupId\> getGroupGroups(GroupId group) const
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Get a list of all groups within a group.
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Delay Methods
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Delay Methods
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-------------
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-------------
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```
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### delay\_t estimateDelay(WireId src, WireId dst) const
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delay_t estimateDelay(WireId src, WireId dst) const
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delay_t getDelayEpsilon() const
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Return an estimate for the total `maxDelay()` delay from the given src wire to
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delay_t getRipupDelayPenalty() const
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the given dst wire.
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float getDelayNS(delay_t v) const
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uint32_t getDelayChecksum(delay_t v) const
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This should return a low upper bound for the fastest route from `src` to `dst`.
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```
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Or in other words it should assume an otherwise unused chip (thus "fastest route").
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But it only produces an estimate for that fastest route, not an exact
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result, and for that estimate it is considered more accaptable to return a
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slightly too high result and it is considered less accaptable to return a
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too low result (thus "low upper bound").
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### delay\_t getDelayEpsilon() const
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Return a small delay value that can be used as small epsilon during routing.
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The router will for example not re-calculate cached routing data if faster routes
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are found when the difference is smaller than this value.
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### delay\_t getRipupDelayPenalty() const
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The base penality when calculating delay penalty for ripping up routed nets. The
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actual penalty used is a multiple of this value (i.e. a weighted version of this value).
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### float getDelayNS(delay\_t v) const
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Convert an `delay_t` to an actual real-world delay in nanoseconds.
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### uint32\_t getDelayChecksum(delay\_t v) const
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Convert a `delay_t` to an integer for checksum calculations.
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Flow Methods
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Flow Methods
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------------
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------------
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```
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### bool pack()
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bool pack()
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bool place()
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Run the packer.
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bool route()
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```
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### bool place()
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Run the placer.
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### bool route()
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run the router.
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Graphics Methods
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Graphics Methods
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----------------
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----------------
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```
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### const\_range\<GraphicElement\> getDecalGraphics(DecalId decal) const
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const_range<GraphicElement> getDecalGraphics(DecalId decal) const
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DecalXY getFrameDecal() const
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Return the graphic elements that make up a decal.
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DecalXY getBelDecal(BelId bel) const
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DecalXY getWireDecal(WireId wire) const
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The same decal must always produce the same list. If the graphics for
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DecalXY getPipDecal(PipId pip) const
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a design element changes, that element must return another decal.
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DecalXY getGroupDecal(GroupId group) const
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```
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### DecalXY getBelDecal(BelId bel) const
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Return the decal and X/Y position for the graphics representing a bel.
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### DecalXY getWireDecal(WireId wire) const
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Return the decal and X/Y position for the graphics representing a wire.
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### DecalXY getPipDecal(PipId pip) const
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Return the decal and X/Y position for the graphics representing a pip.
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### DecalXY getGroupDecal(GroupId group) const
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Return the decal and X/Y position for the graphics representing a group.
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Cell Delay Methods
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Cell Delay Methods
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------------------
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------------------
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```
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### bool getCellDelay(const CellInfo \*cell, IdString fromPort, IdString toPort, DelayInfo &delay) const
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bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const
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IdString getPortClock(const CellInfo *cell, IdString port) const
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Returns the delay for the specified path through a cell in the `&delay` argument. The method returns
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bool isClockPort(const CellInfo *cell, IdString port) const
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false if there is no timing relationship from `fromPort` to `toPort`.
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```
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### IdString getPortClock(const CellInfo \*cell, IdString port) const
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Returns the clock input port for the specified output port.
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### bool isClockPort(const CellInfo \*cell, IdString port) const
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Returns true if the specified port is a clock input.
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Placer Methods
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Placer Methods
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--------------
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--------------
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```
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### bool isValidBelForCell(CellInfo \*cell, BelId bel) const
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bool isValidBelForCell(CellInfo *cell, BelId bel) const
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bool isBelLocationValid(BelId bel) const
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Returns true if the given cell can be bound to the given bel, considering
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```
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other bound resources. For example, this can be used if there is only
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a certain number of different clock signals allowed for a group of bels.
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### bool isBelLocationValid(BelId bel) const
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Returns true if a bell in the current configuration is valid, i.e. if
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`isValidBelForCell()` would return true for the current mapping.
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@ -22,6 +22,7 @@ For nextpnr we are using the following terminology.
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- **Pip**: Programmable Interconnect Point, a configurable connection in one direction between two wires
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- **Pip**: Programmable Interconnect Point, a configurable connection in one direction between two wires
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- **Wire**: a fixed physical connection inside the FPGA between Pips and/or Bel pins.
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- **Wire**: a fixed physical connection inside the FPGA between Pips and/or Bel pins.
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- **Alias**: a special automatic-on Pip to represent a permanent connection between two wires
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- **Alias**: a special automatic-on Pip to represent a permanent connection between two wires
|
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- **Group**: a collection of bels, pips, wires, and/or other groups
|
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|
|
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### Flow Terminology
|
### Flow Terminology
|
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|
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Loading…
Reference in New Issue
Block a user