timing: Improve clock constraint log output
Signed-off-by: David Shah <dave@ds0.me>
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86108bfd39
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0adc0d7529
@ -409,12 +409,16 @@ void Context::check() const
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void BaseCtx::addClock(IdString net, float freq)
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void BaseCtx::addClock(IdString net, float freq)
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{
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{
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log_info("constraining clock net '%s' to %.02f MHz\n", net.c_str(this), freq);
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std::unique_ptr<ClockConstraint> cc(new ClockConstraint());
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std::unique_ptr<ClockConstraint> cc(new ClockConstraint());
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cc->period = getCtx()->getDelayFromNS(1000 / freq);
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cc->period = getCtx()->getDelayFromNS(1000 / freq);
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cc->high = getCtx()->getDelayFromNS(500 / freq);
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cc->high = getCtx()->getDelayFromNS(500 / freq);
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cc->low = getCtx()->getDelayFromNS(500 / freq);
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cc->low = getCtx()->getDelayFromNS(500 / freq);
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nets.at(net)->clkconstr = std::move(cc);
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if (!nets.count(net)) {
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log_warning("net '%s' does not exist in design, ignoring clock constraint\n", net.c_str(this));
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} else {
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nets.at(net)->clkconstr = std::move(cc);
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log_info("constraining clock net '%s' to %.02f MHz\n", net.c_str(this), freq);
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}
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}
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}
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NEXTPNR_NAMESPACE_END
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NEXTPNR_NAMESPACE_END
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