caiyu/nextpnr
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Add absl::flat_hash_map.

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This lowers the CPU cost of using the flat wire map in router2, and should
use less memory as well.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
This commit is contained in:
Keith Rothman 2021-03-01 09:48:29 -08:00
parent 6ff02248a3
commit 0afa0da19f
4 changed files with 11 additions and 1 deletions
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3
.gitmodules vendored
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@ -4,3 +4,6 @@
[submodule "fpga-interchange-schema"]
path = 3rdparty/fpga-interchange-schema
url = https://github.com/SymbiFlow/fpga-interchange-schema.git
[submodule "3rdparty/abseil-cpp"]
path = 3rdparty/abseil-cpp
url = https://github.com/abseil/abseil-cpp.git

1
3rdparty/abseil-cpp vendored Submodule

@ -0,0 +1 @@
Subproject commit a76698790753d2ec71f655cdc84d61bcb27780d4

5
CMakeLists.txt
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@ -171,6 +171,8 @@ if (NOT DEFINED CURRENT_GIT_VERSION)
)
endif()
add_subdirectory(3rdparty/abseil-cpp EXCLUDE_FROM_ALL)
if (BUILD_TESTS)
add_subdirectory(3rdparty/googletest/googletest ${CMAKE_CURRENT_BINARY_DIR}/generated/3rdparty/googletest EXCLUDE_FROM_ALL)
enable_testing()
@ -272,6 +274,9 @@ foreach (family ${ARCH})
# Include the family-specific CMakeFile
include(${family}/family.cmake)
foreach (target ${family_targets})
target_link_libraries(${target} PRIVATE absl::flat_hash_map)
target_link_libraries(${target} PRIVATE absl::flat_hash_set)
# Include family-specific source files to all family targets and set defines appropriately
target_include_directories(${target} PRIVATE ${family}/ ${CMAKE_CURRENT_BINARY_DIR}/generated/)
target_compile_definitions(${target} PRIVATE NEXTPNR_NAMESPACE=nextpnr_${family} ARCH_${ufamily} ARCHNAME=${family})

3
common/router2.cc
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@ -27,6 +27,7 @@
*/
#include "router2.h"
#include <absl/container/flat_hash_map.h>
#include <algorithm>
#include <boost/container/flat_map.hpp>
#include <chrono>
@ -191,7 +192,7 @@ struct Router2
}
}
std::unordered_map<WireId, int> wire_to_idx;
absl::flat_hash_map<WireId, int> wire_to_idx;
std::vector<PerWireData> flat_wires;
PerWireData &wire_data(WireId w) { return flat_wires[wire_to_idx.at(w)]; }