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Extract regmode configuration to ArchInfo

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This commit is contained in:
Ross Schlaikjer 2020-04-07 14:03:55 -04:00
parent c007463168
commit 0bdf1e05f1
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GPG Key ID: 3C4CAA5FEDEF28DA
3 changed files with 16 additions and 8 deletions
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12
ecp5/arch.cc
View File

@ -1073,19 +1073,15 @@ TimingClockingInfo Arch::getPortClockingInfo(const CellInfo *cell, IdString port
: RISING_EDGE; : RISING_EDGE;
// REGMODE determines some timing parameters // REGMODE determines some timing parameters
auto regmode_a = str_or_default(cell->params, id("REGMODE_A"), "NOREG");
auto regmode_b = str_or_default(cell->params, id("REGMODE_B"), "NOREG");
nextpnr_ecp5::IdString regmode_timing; nextpnr_ecp5::IdString regmode_timing;
if (regmode_a == "NOREG" && regmode_b == "NOREG") { if (!cell->ramInfo.output_a_registered && !cell->ramInfo.output_b_registered) {
regmode_timing = id_DP16KD_REGMODE_A_NOREG_REGMODE_B_NOREG; regmode_timing = id_DP16KD_REGMODE_A_NOREG_REGMODE_B_NOREG;
} else if (regmode_a == "NOREG" && regmode_b == "OUTREG") { } else if (!cell->ramInfo.output_a_registered && cell->ramInfo.output_b_registered) {
regmode_timing = id_DP16KD_REGMODE_A_NOREG_REGMODE_B_OUTREG; regmode_timing = id_DP16KD_REGMODE_A_NOREG_REGMODE_B_OUTREG;
} else if (regmode_a == "OUTREG" && regmode_b == "NOREG") { } else if (cell->ramInfo.output_a_registered && !cell->ramInfo.output_b_registered) {
regmode_timing = id_DP16KD_REGMODE_A_OUTREG_REGMODE_B_NOREG; regmode_timing = id_DP16KD_REGMODE_A_OUTREG_REGMODE_B_NOREG;
} else if (regmode_a == "OUTREG" && regmode_b == "OUTREG") { } else if (cell->ramInfo.output_a_registered && cell->ramInfo.output_b_registered) {
regmode_timing = id_DP16KD_REGMODE_A_OUTREG_REGMODE_B_OUTREG; regmode_timing = id_DP16KD_REGMODE_A_OUTREG_REGMODE_B_OUTREG;
} else {
NPNR_ASSERT_FALSE_STR("bad DP16KD REGMODE configuration: " + regmode_a + ", " + regmode_b);
} }
if (cell->ports.at(port).type == PORT_OUT) { if (cell->ports.at(port).type == PORT_OUT) {

2
ecp5/archdefs.h
View File

@ -180,6 +180,8 @@ struct ArchCellInfo
struct struct
{ {
bool is_pdp; bool is_pdp;
bool output_a_registered;
bool output_b_registered;
} ramInfo; } ramInfo;
}; };

10
ecp5/pack.cc
View File

@ -3004,6 +3004,16 @@ void Arch::assignArchInfo()
ci->sliceInfo.has_l6mux = true; ci->sliceInfo.has_l6mux = true;
} else if (ci->type == id_DP16KD) { } else if (ci->type == id_DP16KD) {
ci->ramInfo.is_pdp = (int_or_default(ci->params, id("DATA_WIDTH_A"), 0) == 36); ci->ramInfo.is_pdp = (int_or_default(ci->params, id("DATA_WIDTH_A"), 0) == 36);
// Output register mode (REGMODE_{A,B}). Valid options are 'NOREG' and 'OUTREG'.
std::string regmode_a = str_or_default(ci->params, id("REGMODE_A"), "NOREG");
if (!(regmode_a == "NOREG" || regmode_a == "OUTREG"))
NPNR_ASSERT_FALSE_STR("bad DP16KD REGMODE_A configuration '" + regmode_a + "'");
std::string regmode_b = str_or_default(ci->params, id("REGMODE_B"), "NOREG");
if (!(regmode_b == "NOREG" || regmode_b == "OUTREG"))
NPNR_ASSERT_FALSE_STR("bad DP16KD REGMODE_B configuration '" + regmode_b + "'");
ci->ramInfo.output_a_registered = regmode_a == "OUTREG";
ci->ramInfo.output_b_registered = regmode_b == "OUTREG";
} }
} }
for (auto net : sorted(nets)) { for (auto net : sorted(nets)) {