Merge pull request #270 from smunaut/sb_io_conflict
SB IO conflict checks
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commit
0be844e6a8
@ -1221,8 +1221,8 @@ void Arch::assignCellInfo(CellInfo *cell)
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} else if (cell->type == id_SB_IO) {
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} else if (cell->type == id_SB_IO) {
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cell->ioInfo.lvds = str_or_default(cell->params, id_IO_STANDARD, "SB_LVCMOS") == "SB_LVDS_INPUT";
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cell->ioInfo.lvds = str_or_default(cell->params, id_IO_STANDARD, "SB_LVCMOS") == "SB_LVDS_INPUT";
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cell->ioInfo.global = bool_or_default(cell->attrs, this->id("GLOBAL"));
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cell->ioInfo.global = bool_or_default(cell->attrs, this->id("GLOBAL"));
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cell->ioInfo.pintype = int_or_default(cell->attrs, this->id("PIN_TYPE"));
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cell->ioInfo.pintype = int_or_default(cell->params, this->id("PIN_TYPE"));
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cell->ioInfo.negtrig = bool_or_default(cell->attrs, this->id("NEG_TRIGGER"));
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cell->ioInfo.negtrig = bool_or_default(cell->params, this->id("NEG_TRIGGER"));
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} else if (cell->type == id_SB_GB) {
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} else if (cell->type == id_SB_GB) {
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cell->gbInfo.forPadIn = bool_or_default(cell->attrs, this->id("FOR_PAD_IN"));
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cell->gbInfo.forPadIn = bool_or_default(cell->attrs, this->id("FOR_PAD_IN"));
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@ -91,6 +91,18 @@ bool Arch::isBelLocationValid(BelId bel) const
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}
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}
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}
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}
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static inline bool _io_pintype_need_clk_in(unsigned pin_type) { return (pin_type & 0x01) == 0x00; }
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static inline bool _io_pintype_need_clk_out(unsigned pin_type)
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{
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return ((pin_type & 0x30) == 0x30) || ((pin_type & 0x3c) && ((pin_type & 0x0c) != 0x08));
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}
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static inline bool _io_pintype_need_clk_en(unsigned pin_type)
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{
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return _io_pintype_need_clk_in(pin_type) || _io_pintype_need_clk_out(pin_type);
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}
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bool Arch::isValidBelForCell(CellInfo *cell, BelId bel) const
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bool Arch::isValidBelForCell(CellInfo *cell, BelId bel) const
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{
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{
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if (cell->type == id_ICESTORM_LC) {
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if (cell->type == id_ICESTORM_LC) {
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@ -157,6 +169,30 @@ bool Arch::isValidBelForCell(CellInfo *cell, BelId bel) const
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CellInfo *compCell = getBoundBelCell(compBel);
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CellInfo *compCell = getBoundBelCell(compBel);
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if (compCell && compCell->ioInfo.lvds)
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if (compCell && compCell->ioInfo.lvds)
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return false;
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return false;
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// Check for conflicts on shared nets
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// - CLOCK_ENABLE
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// - OUTPUT_CLK
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// - INPUT_CLK
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if (compCell) {
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bool use[6] = {
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_io_pintype_need_clk_in(cell->ioInfo.pintype),
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_io_pintype_need_clk_in(compCell->ioInfo.pintype),
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_io_pintype_need_clk_out(cell->ioInfo.pintype),
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_io_pintype_need_clk_out(compCell->ioInfo.pintype),
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_io_pintype_need_clk_en(cell->ioInfo.pintype),
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_io_pintype_need_clk_en(compCell->ioInfo.pintype),
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};
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NetInfo *nets[] = {
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cell->ports[id_INPUT_CLK].net, compCell->ports[id_INPUT_CLK].net,
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cell->ports[id_OUTPUT_CLK].net, compCell->ports[id_OUTPUT_CLK].net,
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cell->ports[id_CLOCK_ENABLE].net, compCell->ports[id_CLOCK_ENABLE].net,
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};
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for (int i = 0; i < 6; i++)
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if (use[i] && (nets[i] != nets[i ^ 1]) && (use[i ^ 1] || (nets[i ^ 1] != nullptr)))
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return false;
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}
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}
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}
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return getBelPackagePin(bel) != "";
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return getBelPackagePin(bel) != "";
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