Merge pull request #1106 from YosysHQ/gatecat/fab_carry
fabulous: Add support for packing carry chains
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commit
0c4e0d4312
@ -82,6 +82,7 @@ X(EN)
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X(BEL)
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X(PAD)
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X(LUT1)
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X(LUT4_HA)
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X(BelBegin)
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X(BelEnd)
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@ -96,3 +97,5 @@ X(M_AB)
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X(M_AD)
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X(M_EF)
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X(M_AH)
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X(I0MUX)
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@ -107,11 +107,15 @@ struct FabFasmWriter
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}
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}
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void add_feature(const std::string &name) { out << prefix << name << std::endl; }
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void write_logic(const CellInfo *lc)
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{
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prefix = format_name(ctx->getBelName(lc->bel)) + ".";
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if (lc->type.in(id_FABULOUS_LC, id_FABULOUS_COMB)) {
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write_int_vector_param(lc, "INIT", 0U, 1U << cfg.clb.lut_k); // todo lut depermute and thru
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if (bool_or_default(lc->params, id_I0MUX, false))
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add_feature("IOmux"); // typo in FABulous?
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}
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if (lc->type == id_FABULOUS_LC) {
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write_bool(lc, "FF");
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@ -25,6 +25,8 @@
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#include "viaduct_constids.h"
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#include "viaduct_helpers.h"
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#include "validity_check.h"
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NEXTPNR_NAMESPACE_BEGIN
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namespace {
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@ -36,6 +38,7 @@ struct FabulousPacker
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dict<IdString, unsigned> lut_types;
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std::vector<IdString> lut_inputs;
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CellTagger cell_tags;
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FabulousPacker(Context *ctx, const FabricConfig &cfg) : ctx(ctx), cfg(cfg)
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{
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@ -44,6 +47,8 @@ struct FabulousPacker
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lut_types[ctx->idf("LUT%d", i + 1)] = i + 1;
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lut_inputs.push_back(ctx->idf("I%d", i));
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}
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if (cfg.clb.lut_k == 4)
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lut_types[id_LUT4_HA] = 4; // special case for now
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h.init(ctx);
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}
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@ -77,6 +82,16 @@ struct FabulousPacker
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}
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}
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void assign_lc_info()
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{
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int flat_index = 0;
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for (auto &cell : ctx->cells) {
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cell.second->flat_index = flat_index++;
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if (cell.second->type == id_FABULOUS_LC)
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cell_tags.assign_for(ctx, cfg, cell.second.get());
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}
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}
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// Two-stage flipflop packing. First convert all the random primitives into a much easier-to-handle FABULOUS_FF
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// Then for split-LC mode, cluster it to connected LUTs; separate-LC mode, pack it into a connected or new LC
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@ -179,9 +194,34 @@ struct FabulousPacker
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}
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}
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bool check_cluster_legality(CellInfo *lc) {
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if (lc->cluster == ClusterId())
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return true;
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CLBState test_clb(cfg.clb);
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auto process_cluster_cell = [&](CellInfo *ci) {
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if (ci->constr_y != lc->constr_y)
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return;
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if (ci->type == id_FABULOUS_LC) {
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NPNR_ASSERT(ci->constr_z >= 0 && ci->constr_z < int(cfg.clb.lc_per_clb));
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test_clb.lc_comb[ci->constr_z] = ci;
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} else if (ci->type.in(id_FABULOUS_MUX2, id_FABULOUS_MUX4, id_FABULOUS_MUX8)) {
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int mux_z = (ci->constr_z - cfg.clb.lc_per_clb - 1);
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NPNR_ASSERT(mux_z >= 0 && mux_z < int(cfg.clb.lc_per_clb));
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test_clb.mux[mux_z] = ci;
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}
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// TODO: non-split MODE
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};
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CellInfo *root = ctx->getClusterRootCell(lc->cluster);
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process_cluster_cell(root);
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for (auto child : root->constr_children)
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process_cluster_cell(child);
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return test_clb.check_validity(cfg.clb, cell_tags);
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}
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void pack_ffs()
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{
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pool<IdString> to_delete;
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assign_lc_info();
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for (auto &cell : ctx->cells) {
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CellInfo *ci = cell.second.get();
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if (ci->type != id_FABULOUS_FF)
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@ -194,30 +234,43 @@ struct FabulousPacker
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continue;
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if (!cfg.clb.split_lc && d->users.entries() > 1)
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continue; // TODO: could also resolve by duplicating LUT
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if (drv->cluster != ClusterId()) {
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// TODO: actually we can pack these often, we just have to be more careful to check control sets
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continue;
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}
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// we can pack them together
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if (cfg.clb.split_lc) {
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// create/modify cluster and add constraints. copy from an arch where we do this already...
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NPNR_ASSERT_FALSE("unimplemented");
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} else {
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to_delete.insert(ci->name);
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// this connection is packed inside the LC
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ci->disconnectPort(id_D);
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drv->disconnectPort(id_O);
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// move other ports/params
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// move config ports/params, these affect control set for the legality set
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ci->movePortTo(id_CLK, drv, id_CLK);
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ci->movePortTo(id_SR, drv, id_SR);
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ci->movePortTo(id_EN, drv, id_EN);
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ci->movePortTo(id_O, drv, id_Q);
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drv->params[id_NEG_CLK] = ci->params[id_NEG_CLK];
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drv->params[id_ASYNC_SR] = ci->params[id_ASYNC_SR];
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drv->params[id_SET_NORESET] = ci->params[id_SET_NORESET];
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drv->params[id_FF] = 1;
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// update tags for this cluster checks
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cell_tags.assign_for(ctx, cfg, drv);
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if (drv->cluster != ClusterId()) {
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if (!check_cluster_legality(drv)) {
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// If packing wasn't legal; revert half-finished move
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for (auto p : {id_NEG_CLK, id_SR, id_EN, id_FF})
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drv->params.erase(p);
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drv->movePortTo(id_CLK, ci, id_CLK);
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drv->movePortTo(id_SR, ci, id_SR);
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drv->movePortTo(id_EN, ci, id_EN);
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// revert tag changes too for this cluster checks
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cell_tags.assign_for(ctx, cfg, drv);
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continue;
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}
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}
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// this connection is packed inside the LC
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to_delete.insert(ci->name);
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ci->movePortTo(id_O, drv, id_Q);
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ci->disconnectPort(id_D);
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drv->disconnectPort(id_O);
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for (auto &attr : ci->attrs)
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drv->attrs[attr.first] = attr.second;
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// update tags for future cluster checks
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cell_tags.assign_for(ctx, cfg, drv);
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}
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}
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for (auto del : to_delete)
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@ -279,6 +332,57 @@ struct FabulousPacker
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h.remove_nextpnr_iobs(top_ports);
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}
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void constrain_carries()
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{
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std::vector<CellInfo *> carry_roots;
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for (auto &cell : ctx->cells) {
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CellInfo *ci = cell.second.get();
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if (!ci->type.in(id_FABULOUS_LC, id_FABULOUS_COMB))
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continue;
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if (!ci->getPort(id_Ci) && ci->getPort(id_Co))
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carry_roots.push_back(ci);
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else if (ci->getPort(id_Ci) && ci->getPort(id_Ci)->driver.cell) {
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auto &drv = ci->getPort(id_Ci)->driver;
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if (drv.port != id_Co || !drv.cell->type.in(id_FABULOUS_LC, id_FABULOUS_COMB))
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log_error("Carry cell '%s' has Ci driven by illegal port '%s.%s'\n", ctx->nameOf(ci),
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ctx->nameOf(drv.cell), ctx->nameOf(drv.port));
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}
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}
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for (auto root : carry_roots) {
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CellInfo *cursor = root;
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int dy = 0, dz = 0;
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while (true) {
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// create cluster
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cursor->cluster = root->name;
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cursor->constr_z = dz;
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cursor->constr_abs_z = true;
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if (cursor != root) {
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cursor->constr_x = 0;
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cursor->constr_y = -dy;
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root->constr_children.push_back(cursor);
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}
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NetInfo *co = cursor->getPort(id_Co);
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if (co && !co->users.empty()) {
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if (co->users.entries() > 1)
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log_error("Carry cell '%s' has illegal multiple fanout on Co net '%s'\n", ctx->nameOf(cursor),
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ctx->nameOf(co));
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auto &usr = *(co->users.begin());
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if (usr.port != id_Ci || !usr.cell->type.in(id_FABULOUS_LC, id_FABULOUS_COMB))
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log_error("Carry cell '%s' has illegal fanout '%s.%s' on Co net '%s'\n", ctx->nameOf(cursor),
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ctx->nameOf(usr.cell), ctx->nameOf(usr.port), ctx->nameOf(co));
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cursor = usr.cell;
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} else {
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break;
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}
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++dz;
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if (dz == int(cfg.clb.lc_per_clb)) {
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dz = 0;
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++dy;
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}
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}
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}
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}
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void run()
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{
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update_bel_attrs();
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@ -287,6 +391,7 @@ struct FabulousPacker
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pack_luts();
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pack_muxes();
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prepare_ffs();
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constrain_carries();
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pack_ffs();
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}
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};
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