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machxo2: clang format.

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This commit is contained in:
William D. Jones 2020-12-07 18:56:27 -05:00 committed by gatecat
parent 91ad064249
commit 0e63178fe1
6 changed files with 35 additions and 76 deletions
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5
common/timing_opt.cc
View File

@ -39,8 +39,9 @@ namespace std {
template <> struct hash<std::pair<NEXTPNR_NAMESPACE_PREFIX IdString, NEXTPNR_NAMESPACE_PREFIX IdString>> template <> struct hash<std::pair<NEXTPNR_NAMESPACE_PREFIX IdString, NEXTPNR_NAMESPACE_PREFIX IdString>>
{ {
std::size_t operator()( std::size_t
const std::pair<NEXTPNR_NAMESPACE_PREFIX IdString, NEXTPNR_NAMESPACE_PREFIX IdString> &idp) const noexcept operator()(const std::pair<NEXTPNR_NAMESPACE_PREFIX IdString, NEXTPNR_NAMESPACE_PREFIX IdString> &idp) const
noexcept
{ {
std::size_t seed = 0; std::size_t seed = 0;
boost::hash_combine(seed, hash<NEXTPNR_NAMESPACE_PREFIX IdString>()(idp.first)); boost::hash_combine(seed, hash<NEXTPNR_NAMESPACE_PREFIX IdString>()(idp.first));

84
machxo2/arch.cc
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@ -19,8 +19,8 @@
#include <iostream> #include <iostream>
#include <math.h> #include <math.h>
#include "nextpnr.h"
#include "embed.h" #include "embed.h"
#include "nextpnr.h"
#include "placer1.h" #include "placer1.h"
#include "placer_heap.h" #include "placer_heap.h"
#include "router1.h" #include "router1.h"
@ -40,15 +40,15 @@ static std::tuple<int, int, std::string> split_identifier_name(const std::string
name.substr(second_slash + 1)); name.substr(second_slash + 1));
}; };
// ----------------------------------------------------------------------- // -----------------------------------------------------------------------
void IdString::initialize_arch(const BaseCtx *ctx) { void IdString::initialize_arch(const BaseCtx *ctx)
#define X(t) initialize_add(ctx, #t, ID_##t); {
#define X(t) initialize_add(ctx, #t, ID_##t);
#include "constids.inc" #include "constids.inc"
#undef X #undef X
} }
// --------------------------------------------------------------- // ---------------------------------------------------------------
@ -171,16 +171,15 @@ BelId Arch::getBelByLocation(Loc loc) const
{ {
BelId ret; BelId ret;
if(loc.x >= chip_info->width || loc.y >= chip_info->height) if (loc.x >= chip_info->width || loc.y >= chip_info->height)
return BelId(); return BelId();
ret.location.x = loc.x; ret.location.x = loc.x;
ret.location.y = loc.y; ret.location.y = loc.y;
const TileTypePOD *tilei = tileInfo(ret); const TileTypePOD *tilei = tileInfo(ret);
for(int i = 0; i < tilei->num_bels; i++) { for (int i = 0; i < tilei->num_bels; i++) {
if(tilei->bel_data[i].z == loc.z) if (tilei->bel_data[i].z == loc.z) {
{
ret.index = i; ret.index = i;
return ret; return ret;
} }
@ -217,8 +216,8 @@ WireId Arch::getBelPinWire(BelId bel, IdString pin) const
int num_bel_wires = tileInfo(bel)->bel_data[bel.index].num_bel_wires; int num_bel_wires = tileInfo(bel)->bel_data[bel.index].num_bel_wires;
const BelWirePOD *bel_wires = &*tileInfo(bel)->bel_data[bel.index].bel_wires; const BelWirePOD *bel_wires = &*tileInfo(bel)->bel_data[bel.index].bel_wires;
for(int i = 0; i < num_bel_wires; i++) for (int i = 0; i < num_bel_wires; i++)
if(bel_wires[i].port == pin.index) { if (bel_wires[i].port == pin.index) {
WireId ret; WireId ret;
ret.location.x = bel_wires[i].rel_wire_loc.x; ret.location.x = bel_wires[i].rel_wire_loc.x;
@ -238,8 +237,8 @@ PortType Arch::getBelPinType(BelId bel, IdString pin) const
int num_bel_wires = tileInfo(bel)->bel_data[bel.index].num_bel_wires; int num_bel_wires = tileInfo(bel)->bel_data[bel.index].num_bel_wires;
const BelWirePOD *bel_wires = &*tileInfo(bel)->bel_data[bel.index].bel_wires; const BelWirePOD *bel_wires = &*tileInfo(bel)->bel_data[bel.index].bel_wires;
for(int i = 0; i < num_bel_wires; i++) for (int i = 0; i < num_bel_wires; i++)
if(bel_wires[i].port == pin.index) if (bel_wires[i].port == pin.index)
return PortType(bel_wires[i].dir); return PortType(bel_wires[i].dir);
return PORT_INOUT; return PORT_INOUT;
@ -253,7 +252,7 @@ std::vector<IdString> Arch::getBelPins(BelId bel) const
int num_bel_wires = tileInfo(bel)->bel_data[bel.index].num_bel_wires; int num_bel_wires = tileInfo(bel)->bel_data[bel.index].num_bel_wires;
const BelWirePOD *bel_wires = &*tileInfo(bel)->bel_data[bel.index].bel_wires; const BelWirePOD *bel_wires = &*tileInfo(bel)->bel_data[bel.index].bel_wires;
for(int i = 0; i < num_bel_wires; i++) { for (int i = 0; i < num_bel_wires; i++) {
IdString id(bel_wires[i].port); IdString id(bel_wires[i].port);
ret.push_back(id); ret.push_back(id);
} }
@ -263,10 +262,7 @@ std::vector<IdString> Arch::getBelPins(BelId bel) const
// --------------------------------------------------------------- // ---------------------------------------------------------------
WireId Arch::getWireByName(IdString name) const WireId Arch::getWireByName(IdString name) const { return WireId(); }
{
return WireId();
}
IdString Arch::getWireName(WireId wire) const { return IdString(); } IdString Arch::getWireName(WireId wire) const { return IdString(); }
@ -280,15 +276,9 @@ uint32_t Arch::getWireChecksum(WireId wire) const
return 0; return 0;
} }
void Arch::bindWire(WireId wire, NetInfo *net, PlaceStrength strength) void Arch::bindWire(WireId wire, NetInfo *net, PlaceStrength strength) {}
{
} void Arch::unbindWire(WireId wire) {}
void Arch::unbindWire(WireId wire)
{
}
bool Arch::checkWireAvail(WireId wire) const { return false; } bool Arch::checkWireAvail(WireId wire) const { return false; }
@ -302,10 +292,7 @@ const std::vector<WireId> &Arch::getWires() const { return wire_id_dummy; }
// --------------------------------------------------------------- // ---------------------------------------------------------------
PipId Arch::getPipByName(IdString name) const PipId Arch::getPipByName(IdString name) const { return PipId(); }
{
return PipId();
}
IdString Arch::getPipName(PipId pip) const { return IdString(); } IdString Arch::getPipName(PipId pip) const { return IdString(); }
@ -319,15 +306,9 @@ uint32_t Arch::getPipChecksum(PipId wire) const
return 0; return 0;
} }
void Arch::bindPip(PipId pip, NetInfo *net, PlaceStrength strength) void Arch::bindPip(PipId pip, NetInfo *net, PlaceStrength strength) {}
{
} void Arch::unbindPip(PipId pip) {}
void Arch::unbindPip(PipId pip)
{
}
bool Arch::checkPipAvail(PipId pip) const { return false; } bool Arch::checkPipAvail(PipId pip) const { return false; }
@ -375,15 +356,9 @@ const std::vector<GroupId> &Arch::getGroupGroups(GroupId group) const { return g
// --------------------------------------------------------------- // ---------------------------------------------------------------
delay_t Arch::estimateDelay(WireId src, WireId dst) const delay_t Arch::estimateDelay(WireId src, WireId dst) const { return 0; }
{
return 0;
}
delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const { return 0; }
{
return 0;
}
bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay_t &budget) const { return false; } bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay_t &budget) const { return false; }
@ -428,10 +403,7 @@ bool Arch::route()
// --------------------------------------------------------------- // ---------------------------------------------------------------
const std::vector<GraphicElement> &Arch::getDecalGraphics(DecalId decal) const const std::vector<GraphicElement> &Arch::getDecalGraphics(DecalId decal) const { return graphic_element_dummy; }
{
return graphic_element_dummy;
}
DecalXY Arch::getBelDecal(BelId bel) const { return DecalXY(); } DecalXY Arch::getBelDecal(BelId bel) const { return DecalXY(); }
@ -489,14 +461,8 @@ const std::vector<std::string> Arch::availablePlacers = {"sa",
const std::string Arch::defaultRouter = "router1"; const std::string Arch::defaultRouter = "router1";
const std::vector<std::string> Arch::availableRouters = {"router1", "router2"}; const std::vector<std::string> Arch::availableRouters = {"router1", "router2"};
void Arch::assignArchInfo() void Arch::assignArchInfo() {}
{
} bool Arch::cellsCompatible(const CellInfo **cells, int count) const { return false; }
bool Arch::cellsCompatible(const CellInfo **cells, int count) const
{
return false;
}
NEXTPNR_NAMESPACE_END NEXTPNR_NAMESPACE_END

9
machxo2/arch.h
View File

@ -159,8 +159,7 @@ struct BelIterator
BelIterator operator++() BelIterator operator++()
{ {
cursor_index++; cursor_index++;
while (cursor_tile < chip->num_tiles && while (cursor_tile < chip->num_tiles && cursor_index >= chip->tiles[cursor_tile].num_bels) {
cursor_index >= chip->tiles[cursor_tile].num_bels) {
cursor_index = 0; cursor_index = 0;
cursor_tile++; cursor_tile++;
} }
@ -235,8 +234,7 @@ struct WireIterator
WireIterator operator++() WireIterator operator++()
{ {
cursor_index++; cursor_index++;
while (cursor_tile < chip->num_tiles && while (cursor_tile < chip->num_tiles && cursor_index >= chip->tiles[cursor_tile].num_wires) {
cursor_index >= chip->tiles[cursor_tile].num_wires) {
cursor_index = 0; cursor_index = 0;
cursor_tile++; cursor_tile++;
} }
@ -286,8 +284,7 @@ struct AllPipIterator
AllPipIterator operator++() AllPipIterator operator++()
{ {
cursor_index++; cursor_index++;
while (cursor_tile < chip->num_tiles && while (cursor_tile < chip->num_tiles && cursor_index >= chip->tiles[cursor_tile].num_pips) {
cursor_index >= chip->tiles[cursor_tile].num_pips) {
cursor_index = 0; cursor_index = 0;
cursor_tile++; cursor_tile++;
} }

2
machxo2/archdefs.h
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@ -179,4 +179,4 @@ template <> struct hash<NEXTPNR_NAMESPACE_PREFIX PipId>
} }
}; };
} } // namespace std

5
machxo2/cells.cc
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@ -171,9 +171,6 @@ void dff_to_lc(const Context *ctx, CellInfo *dff, CellInfo *lc, bool pass_thru_l
replace_port(dff, ctx->id("Q"), lc, ctx->id("Q0")); replace_port(dff, ctx->id("Q"), lc, ctx->id("Q0"));
} }
void nxio_to_iob(Context *ctx, CellInfo *nxio, CellInfo *iob, std::unordered_set<IdString> &todelete_cells) void nxio_to_iob(Context *ctx, CellInfo *nxio, CellInfo *iob, std::unordered_set<IdString> &todelete_cells) {}
{
}
NEXTPNR_NAMESPACE_END NEXTPNR_NAMESPACE_END

6
machxo2/pack.cc
View File

@ -39,8 +39,7 @@ static void pack_lut_lutffs(Context *ctx)
if (ctx->verbose) if (ctx->verbose)
log_info("cell '%s' is of type '%s'\n", ci->name.c_str(ctx), ci->type.c_str(ctx)); log_info("cell '%s' is of type '%s'\n", ci->name.c_str(ctx), ci->type.c_str(ctx));
if (is_lut(ctx, ci)) { if (is_lut(ctx, ci)) {
std::unique_ptr<CellInfo> packed = std::unique_ptr<CellInfo> packed = create_machxo2_cell(ctx, id_FACADE_SLICE, ci->name.str(ctx) + "_LC");
create_machxo2_cell(ctx, id_FACADE_SLICE, ci->name.str(ctx) + "_LC");
std::copy(ci->attrs.begin(), ci->attrs.end(), std::inserter(packed->attrs, packed->attrs.begin())); std::copy(ci->attrs.begin(), ci->attrs.end(), std::inserter(packed->attrs, packed->attrs.begin()));
packed_cells.insert(ci->name); packed_cells.insert(ci->name);
@ -89,7 +88,7 @@ static void pack_lut_lutffs(Context *ctx)
// Merge a net into a constant net // Merge a net into a constant net
static void set_net_constant(const Context *ctx, NetInfo *orig, NetInfo *constnet, bool constval) static void set_net_constant(const Context *ctx, NetInfo *orig, NetInfo *constnet, bool constval)
{ {
(void) constval; (void)constval;
orig->driver.cell = nullptr; orig->driver.cell = nullptr;
for (auto user : orig->users) { for (auto user : orig->users) {
@ -105,7 +104,6 @@ static void set_net_constant(const Context *ctx, NetInfo *orig, NetInfo *constne
orig->users.clear(); orig->users.clear();
} }
// Pack constants (based on simple implementation in generic). // Pack constants (based on simple implementation in generic).
// VCC/GND cells provided by nextpnr automatically. // VCC/GND cells provided by nextpnr automatically.
static void pack_constants(Context *ctx) static void pack_constants(Context *ctx)