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Made Pip and Wires trees work

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This commit is contained in:
Miodrag Milanovic 2018-11-28 19:49:28 +01:00
parent bfa2157ae6
commit 105c148848
3 changed files with 39 additions and 11 deletions
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9
gui/designwidget.cc
View File

@ -317,6 +317,12 @@ void DesignWidget::newContext(Context *ctx)
for (const auto &wire : ctx->getWires()) { for (const auto &wire : ctx->getWires()) {
wireMap[std::pair<int, int>(wire.location.x, wire.location.y)].push_back(wire); wireMap[std::pair<int, int>(wire.location.x, wire.location.y)].push_back(wire);
} }
#endif
#ifdef ARCH_XC7
for (const auto &wire : ctx->getWires()) {
const auto loc = torc_info->wire_to_loc(wire.index);
wireMap[std::pair<int, int>(loc.x, loc.y)].push_back(wire);
}
#endif #endif
auto wireGetter = [](Context *ctx, WireId id) { return ctx->getWireName(id); }; auto wireGetter = [](Context *ctx, WireId id) { return ctx->getWireName(id); };
getTreeByElementType(ElementType::WIRE) getTreeByElementType(ElementType::WIRE)
@ -706,8 +712,9 @@ void DesignWidget::onSelectionChanged(int num, const QItemSelection &, const QIt
addProperty(topItem, QVariant::String, "Type", ctx->getPipType(pip).c_str(ctx)); addProperty(topItem, QVariant::String, "Type", ctx->getPipType(pip).c_str(ctx));
addProperty(topItem, QVariant::Bool, "Available", ctx->checkPipAvail(pip)); addProperty(topItem, QVariant::Bool, "Available", ctx->checkPipAvail(pip));
addProperty(topItem, QVariant::String, "Bound Net", ctx->nameOf(ctx->getBoundPipNet(pip)), ElementType::NET); addProperty(topItem, QVariant::String, "Bound Net", ctx->nameOf(ctx->getBoundPipNet(pip)), ElementType::NET);
WireId conflict = ctx->getConflictingPipWire(pip);
addProperty(topItem, QVariant::String, "Conflicting Wire", addProperty(topItem, QVariant::String, "Conflicting Wire",
ctx->getWireName(ctx->getConflictingPipWire(pip)).c_str(ctx), ElementType::WIRE); (conflict!=WireId() ? ctx->getWireName(conflict).c_str(ctx) : ""), ElementType::WIRE);
addProperty(topItem, QVariant::String, "Conflicting Net", ctx->nameOf(ctx->getConflictingPipNet(pip)), addProperty(topItem, QVariant::String, "Conflicting Net", ctx->nameOf(ctx->getConflictingPipNet(pip)),
ElementType::NET); ElementType::NET);
addProperty(topItem, QVariant::String, "Src Wire", ctx->getWireName(ctx->getPipSrcWire(pip)).c_str(ctx), addProperty(topItem, QVariant::String, "Src Wire", ctx->getWireName(ctx->getPipSrcWire(pip)).c_str(ctx),

28
xc7/arch.cc
View File

@ -388,9 +388,19 @@ IdString Arch::archArgsToId(ArchArgs args) const
// ----------------------------------------------------------------------- // -----------------------------------------------------------------------
static bool endsWith(const std::string& str, const std::string& suffix)
{
return str.size() >= suffix.size() && 0 == str.compare(str.size()-suffix.size(), suffix.size(), suffix);
}
BelId Arch::getBelByName(IdString name) const BelId Arch::getBelByName(IdString name) const
{ {
auto it = torc_info->sites.findSiteIndex(name.str(this)); std::string n = name.str(this);
if (endsWith(n,"_A") || endsWith(n,"_B") || endsWith(n,"_C") || endsWith(n,"_D"))
{
n = n.substr(0,n.size()-2);
}
auto it = torc_info->sites.findSiteIndex(n);
if (it != SiteIndex(-1)) if (it != SiteIndex(-1))
return torc_info->site_index_to_bel.at(it); return torc_info->site_index_to_bel.at(it);
return BelId(); return BelId();
@ -561,13 +571,13 @@ WireId Arch::getWireByName(IdString name) const
WireId ret; WireId ret;
if (wire_by_name.empty()) { if (wire_by_name.empty()) {
for (int i = 0; i < chip_info->num_wires; i++) for (int i = 0; i < torc_info->num_wires; i++)
wire_by_name[id(chip_info->wire_data[i].name.get())] = i; wire_by_name[id(torc_info->wire_to_name(i))] = i;
} }
// auto it = wire_by_name.find(name); auto it = wire_by_name.find(name);
// if (it != wire_by_name.end()) if (it != wire_by_name.end())
// ret.index = it->second; ret.index = it->second;
return ret; return ret;
} }
@ -623,8 +633,8 @@ PipId Arch::getPipByName(IdString name) const
{ {
PipId ret; PipId ret;
/* if (pip_by_name.empty()) { if (pip_by_name.empty()) {
for (int i = 0; i < chip_info->num_pips; i++) { for (int i = 0; i < torc_info->num_pips; i++) {
PipId pip; PipId pip;
pip.index = i; pip.index = i;
pip_by_name[getPipName(pip)] = i; pip_by_name[getPipName(pip)] = i;
@ -634,7 +644,7 @@ PipId Arch::getPipByName(IdString name) const
auto it = pip_by_name.find(name); auto it = pip_by_name.find(name);
if (it != pip_by_name.end()) if (it != pip_by_name.end())
ret.index = it->second; ret.index = it->second;
*/
return ret; return ret;
} }

13
xc7/arch.h
View File

@ -299,6 +299,17 @@ struct TorcInfo
ss << "(" << tw.getWireIndex() << "@" << tw.getTileIndex() << ")"; ss << "(" << tw.getWireIndex() << "@" << tw.getTileIndex() << ")";
return ss.str(); return ss.str();
} }
Loc wire_to_loc(int32_t index) const
{
const auto &tw = wire_to_tilewire[index];
ExtendedWireInfo ewi(*ddb, tw);
Loc l;
l.x = (int)ewi.mTileCol;
l.y = (int)ewi.mTileRow;
return l;
}
WireId tilewire_to_wire(const Tilewire &tw) const WireId tilewire_to_wire(const Tilewire &tw) const
{ {
const auto &segment = segments.getTilewireSegment(tw); const auto &segment = segments.getTilewireSegment(tw);
@ -708,7 +719,7 @@ struct Arch : BaseCtx
// NPNR_ASSERT(wire != WireId()); // NPNR_ASSERT(wire != WireId());
// range.b.ptr = chip_info->wire_data[wire.index].bel_pins.get(); // range.b.ptr = chip_info->wire_data[wire.index].bel_pins.get();
// range.e.ptr = range.b.ptr + chip_info->wire_data[wire.index].num_bel_pins; // range.e.ptr = range.b.ptr + chip_info->wire_data[wire.index].num_bel_pins;
throw; //throw;
return range; return range;
} }