From 415c097df8db5693c7acd171a4ee6cb5d7b23b94 Mon Sep 17 00:00:00 2001 From: gatecat Date: Tue, 20 Sep 2022 13:42:51 +0200 Subject: [PATCH 1/2] router2: Reserve source wire, too Signed-off-by: gatecat --- common/route/router2.cc | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/common/route/router2.cc b/common/route/router2.cc index d054c9ef..ed1a6fe0 100644 --- a/common/route/router2.cc +++ b/common/route/router2.cc @@ -453,6 +453,13 @@ struct Router2 { bool did_something = false; WireId src = ctx->getNetinfoSourceWire(net); + { + auto &src_wd = wire_data(src); + if (src_wd.reserved_net != -1 && src_wd.reserved_net != net->udata) + log_error("attempting to reserve src wire '%s' for nets '%s' and '%s'\n", ctx->nameOfWire(src), + ctx->nameOf(nets_by_udata.at(src_wd.reserved_net)), ctx->nameOf(net)); + src_wd.reserved_net = net->udata; + } auto &usr = net->users.at(i); for (auto sink : ctx->getNetinfoSinkWires(net, usr)) { pool rsv; From a920ffcf70dad54596c84079c30a66542022ccda Mon Sep 17 00:00:00 2001 From: gatecat Date: Tue, 20 Sep 2022 14:15:10 +0200 Subject: [PATCH 2/2] ice40: implement checkPipAvailForNet Signed-off-by: gatecat --- ice40/arch.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/ice40/arch.h b/ice40/arch.h index 3563baad..5ed2347d 100644 --- a/ice40/arch.h +++ b/ice40/arch.h @@ -680,6 +680,16 @@ struct Arch : BaseArch return switches_locked[pi.switch_index] == WireId(); } + bool checkPipAvailForNet(PipId pip, NetInfo *net) const override + { + if (ice40_pip_hard_unavail(pip)) + return false; + + auto &pi = chip_info->pip_data[pip.index]; + auto swl = switches_locked[pi.switch_index]; + return swl == WireId() || (swl == getPipDstWire(pip) && wire_to_net[swl.index] == net); + } + NetInfo *getBoundPipNet(PipId pip) const override { NPNR_ASSERT(pip != PipId());