interchange: added boards and group testing across multiple boards
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
This commit is contained in:
parent
2956a0ca03
commit
15e945aa1c
45
fpga_interchange/examples/boards.cmake
Normal file
45
fpga_interchange/examples/boards.cmake
Normal file
@ -0,0 +1,45 @@
|
||||
function(add_board)
|
||||
# ~~~
|
||||
# add_board(
|
||||
# name <board name>
|
||||
# device <common device>
|
||||
# package <package>
|
||||
# )
|
||||
# ~~~
|
||||
#
|
||||
# Generates a board target containing information on the common device and package
|
||||
# of the board.
|
||||
#
|
||||
# Arguments:
|
||||
# - name: name of the board. E.g. arty
|
||||
# - device: common device name of a set of parts. E.g. xc7a35tcsg324-1 and xc7a35tcpg236-1
|
||||
# share the same xc7a35t device prefix
|
||||
# - package: one of the packages available for a given device. E.g. cpg236
|
||||
#
|
||||
# Targets generated:
|
||||
# - board-<name>
|
||||
|
||||
set(options)
|
||||
set(oneValueArgs name device package)
|
||||
set(multiValueArgs)
|
||||
|
||||
cmake_parse_arguments(
|
||||
add_board
|
||||
"${options}"
|
||||
"${oneValueArgs}"
|
||||
"${multiValueArgs}"
|
||||
${ARGN}
|
||||
)
|
||||
|
||||
set(name ${add_board_name})
|
||||
set(device ${add_board_device})
|
||||
set(package ${add_board_package})
|
||||
|
||||
add_custom_target(board-${name} DEPENDS device-${device})
|
||||
set_target_properties(
|
||||
board-${name}
|
||||
PROPERTIES
|
||||
DEVICE ${device}
|
||||
PACKAGE ${package}
|
||||
)
|
||||
endfunction()
|
29
fpga_interchange/examples/boards/CMakeLists.txt
Normal file
29
fpga_interchange/examples/boards/CMakeLists.txt
Normal file
@ -0,0 +1,29 @@
|
||||
add_board(
|
||||
name arty35t
|
||||
device xc7a35t
|
||||
package csg324
|
||||
)
|
||||
|
||||
add_board(
|
||||
name arty100t
|
||||
device xc7a100t
|
||||
package csg324
|
||||
)
|
||||
|
||||
add_board(
|
||||
name nexys_video
|
||||
device xc7a200t
|
||||
package sbg484
|
||||
)
|
||||
|
||||
add_board(
|
||||
name basys3
|
||||
device xc7a35t
|
||||
package cpg236
|
||||
)
|
||||
|
||||
add_board(
|
||||
name zybo
|
||||
device xc7z010
|
||||
package clg400
|
||||
)
|
@ -263,3 +263,74 @@ function(add_interchange_test)
|
||||
add_custom_target(test-${family}-${name}-dcp DEPENDS ${dcp})
|
||||
add_dependencies(all-${family}-tests test-${family}-${name}-dcp)
|
||||
endfunction()
|
||||
|
||||
function(add_interchange_group_test)
|
||||
# ~~~
|
||||
# add_interchange_group_test(
|
||||
# name <name>
|
||||
# family <family>
|
||||
# board_list <boards>
|
||||
# xdc_list <xdc>
|
||||
# tcl <tcl>
|
||||
# sources <sources list>
|
||||
# [top <top name>]
|
||||
# [techmap <techmap file>]
|
||||
# )
|
||||
#
|
||||
# Generates targets to run desired tests over multiple devices.
|
||||
#
|
||||
# Arguments:
|
||||
# - name: base test name. The real test name will be <name>_<board>
|
||||
# - family: nextpnr architecture family (e.g. fpga_interchange)
|
||||
# - board_list: list of boards, one for each test
|
||||
# - tcl: tcl script used for synthesis
|
||||
# - sources: list of HDL sources
|
||||
# - top (optional): name of the top level module.
|
||||
# If not provided, "top" is assigned as top level module
|
||||
# - techmap (optional): techmap file used during synthesis
|
||||
#
|
||||
# This function internally calls add_interchange_test to generate the various tests.
|
||||
#
|
||||
# Note: it is assumed that there exists an XDC file for each board, with the following naming
|
||||
# convention: <board>.xdc
|
||||
|
||||
set(options)
|
||||
set(oneValueArgs name family tcl top techmap)
|
||||
set(multiValueArgs sources board_list)
|
||||
|
||||
cmake_parse_arguments(
|
||||
add_interchange_group_test
|
||||
"${options}"
|
||||
"${oneValueArgs}"
|
||||
"${multiValueArgs}"
|
||||
${ARGN}
|
||||
)
|
||||
|
||||
set(name ${add_interchange_group_test_name})
|
||||
set(family ${add_interchange_group_test_family})
|
||||
set(top ${add_interchange_group_test_top})
|
||||
set(tcl ${add_interchange_group_test_tcl})
|
||||
set(techmap ${add_interchange_group_test_techmap})
|
||||
set(sources ${add_interchange_group_test_sources})
|
||||
|
||||
if (NOT DEFINED top)
|
||||
# Setting default top value
|
||||
set(top "top")
|
||||
endif()
|
||||
|
||||
foreach(board ${add_interchange_group_test_board_list})
|
||||
get_property(device TARGET board-${board} PROPERTY DEVICE)
|
||||
get_property(package TARGET board-${board} PROPERTY PACKAGE)
|
||||
|
||||
add_interchange_test(
|
||||
name ${name}_${board}
|
||||
family ${family}
|
||||
device ${device}
|
||||
package ${package}
|
||||
tcl ${tcl}
|
||||
xdc ${board}.xdc
|
||||
sources ${sources}
|
||||
top ${top}
|
||||
)
|
||||
endforeach()
|
||||
endfunction()
|
||||
|
@ -1,49 +1,7 @@
|
||||
add_interchange_test(
|
||||
name wire_basys3
|
||||
add_interchange_group_test(
|
||||
name wire
|
||||
family ${family}
|
||||
device xc7a35t
|
||||
package cpg236
|
||||
board_list basys3 arty35t zybo arty100t nexys_video
|
||||
tcl run.tcl
|
||||
xdc wire_basys3.xdc
|
||||
sources wire.v
|
||||
)
|
||||
|
||||
add_interchange_test(
|
||||
name wire_arty_35t
|
||||
family ${family}
|
||||
device xc7a35t
|
||||
package csg324
|
||||
tcl run.tcl
|
||||
xdc wire_arty.xdc
|
||||
sources wire.v
|
||||
)
|
||||
|
||||
add_interchange_test(
|
||||
name wire_arty_100t
|
||||
family ${family}
|
||||
device xc7a100t
|
||||
package csg324
|
||||
tcl run.tcl
|
||||
xdc wire_arty.xdc
|
||||
sources wire.v
|
||||
)
|
||||
|
||||
add_interchange_test(
|
||||
name wire_nexys_video
|
||||
family ${family}
|
||||
device xc7a200t
|
||||
package sbg484
|
||||
tcl run.tcl
|
||||
xdc wire_nexys_video.xdc
|
||||
sources wire.v
|
||||
)
|
||||
|
||||
add_interchange_test(
|
||||
name wire_zybo
|
||||
family ${family}
|
||||
device xc7z010
|
||||
package clg400
|
||||
tcl run.tcl
|
||||
xdc wire_zybo.xdc
|
||||
sources wire.v
|
||||
)
|
||||
|
5
fpga_interchange/examples/tests/wire/arty35t.xdc
Normal file
5
fpga_interchange/examples/tests/wire/arty35t.xdc
Normal file
@ -0,0 +1,5 @@
|
||||
set_property PACKAGE_PIN A8 [get_ports i]
|
||||
set_property PACKAGE_PIN H5 [get_ports o]
|
||||
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports i]
|
||||
set_property IOSTANDARD LVCMOS33 [get_ports o]
|
@ -15,6 +15,7 @@ set(INTERCHANGE_SCHEMA_PATH ${PROJECT_SOURCE_DIR}/3rdparty/fpga-interchange-sche
|
||||
add_subdirectory(3rdparty/fpga-interchange-schema/cmake/cxx_static)
|
||||
|
||||
include(${family}/examples/chipdb.cmake)
|
||||
include(${family}/examples/boards.cmake)
|
||||
include(${family}/examples/tests.cmake)
|
||||
|
||||
set(chipdb_dir ${CMAKE_CURRENT_BINARY_DIR}/${family}/chipdb)
|
||||
@ -23,6 +24,7 @@ file(MAKE_DIRECTORY ${chipdb_dir})
|
||||
add_custom_target(all-${family}-tests)
|
||||
add_custom_target(all-${family}-archcheck-tests)
|
||||
add_subdirectory(${family}/examples/devices)
|
||||
add_subdirectory(${family}/examples/boards)
|
||||
add_subdirectory(${family}/examples/tests)
|
||||
|
||||
set(PROTOS lookahead.capnp)
|
||||
|
Loading…
Reference in New Issue
Block a user