caiyu/nextpnr
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Add many new wires

Browse Source
This commit is contained in:
Miodrag Milanovic 2019-12-13 14:01:28 +01:00
parent 7fd856b866
commit 16f6aaa68c
4 changed files with 1250 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
ecp5/constids.inc
View File

@ -1297,6 +1297,13 @@ X(ECSOUT)
X(WIRE_TYPE_NONE)
X(WIRE_TYPE_SLICE)
X(WIRE_TYPE_DQS)
X(WIRE_TYPE_IOLOGIC)
X(WIRE_TYPE_PIO)
X(WIRE_TYPE_DDRDLL)
X(WIRE_TYPE_EBR)
X(WIRE_TYPE_MULT18)
X(WIRE_TYPE_ALU54)
X(WIRE_TYPE_H00)
X(WIRE_TYPE_H01)
X(WIRE_TYPE_H02)

106
ecp5/gfx.cc
View File

@ -65,6 +65,102 @@ void gfxTileWire(std::vector<GraphicElement> &g, int x, int y, int w, int h, IdS
g.push_back(el);
}
}
if (wire_type == id_WIRE_TYPE_PIO) {
GraphicElement el;
el.type = GraphicElement::TYPE_LINE;
el.style = style;
bool top_bottom = (y == 0 || y == (h - 1));
int gap = 3-(tilewire - TILE_WIRE_PADDOD_PIO)/5;
int num = (tilewire - TILE_WIRE_PADDOD_PIO)%5;
if (top_bottom) {
el.x1 = x + io_cell_h_x1 + (gap + 2) * 0.10 + 0.0017f * (num + 1);
el.x2 = el.x1;
if (y == h - 1) {
el.y1 = y + 1 - io_cell_h_y2;
el.y2 = el.y1 - 0.015f;
} else {
el.y1 = y + io_cell_h_y2;
el.y2 = el.y1 + 0.015f;
}
} else {
if (x == 0) {
el.x1 = x + 1 - io_cell_v_x1;
el.x2 = el.x1 + 0.015f;
} else {
el.x1 = x + io_cell_v_x1;
el.x2 = el.x1 - 0.015f;
}
el.y1 = y + io_cell_v_y1 + gap * 0.10 + 0.0017f * (num + 1);
el.y2 = el.y1;
}
g.push_back(el);
}
if (wire_type == id_WIRE_TYPE_IOLOGIC) {
GraphicElement el;
el.type = GraphicElement::TYPE_LINE;
el.style = style;
int gap = 7-(tilewire - TILE_WIRE_JLOADND_IOLOGIC)/42;
int num = (tilewire - TILE_WIRE_JLOADND_IOLOGIC)%42;
if (x == 0) {
el.x1 = x + 1 - io_cell_v_x1;
el.x2 = el.x1 + 0.015f;
} else {
el.x1 = x + io_cell_v_x1;
el.x2 = el.x1 - 0.015f;
}
el.y1 = y + io_cell_v_y1 + gap * 0.10 + 0.0017f * (num + 1);
el.y2 = el.y1;
g.push_back(el);
}
if (wire_type == id_WIRE_TYPE_DQS) {
GraphicElement el;
el.type = GraphicElement::TYPE_LINE;
el.style = style;
int num = (tilewire - TILE_WIRE_DDRDEL_DQS);
if (x == 0) {
el.x1 = x + 1 - io_cell_v_x1;
el.x2 = el.x1 + 0.015f;
} else {
el.x1 = x + io_cell_v_x1;
el.x2 = el.x1 - 0.015f;
}
el.y1 = y + io_cell_v_y1 + 8 * 0.10 + 0.0017f * (num + 1);
el.y2 = el.y1;
g.push_back(el);
}
if (wire_type == id_WIRE_TYPE_EBR) {
GraphicElement el;
el.type = GraphicElement::TYPE_LINE;
el.style = style;
el.x1 = x + slice_x1 - 0.005f;
el.x2 = x + slice_x1;
el.y1 = y + slice_y2 - 0.0017f * (tilewire - TILE_WIRE_JADA0_EBR + 1) + 3 * slice_pitch;
el.y2 = y + slice_y2 - 0.0017f * (tilewire - TILE_WIRE_JADA0_EBR + 1) + 3 * slice_pitch;
g.push_back(el);
}
if (wire_type == id_WIRE_TYPE_MULT18) {
GraphicElement el;
el.type = GraphicElement::TYPE_LINE;
el.style = style;
el.x1 = x + slice_x1 - 0.005f;
el.x2 = x + slice_x1;
el.y1 = y + slice_y2 - 0.00085f * (tilewire - TILE_WIRE_JCLK0_MULT18 + 1) + 3 * slice_pitch;
el.y2 = y + slice_y2 - 0.00085f * (tilewire - TILE_WIRE_JCLK0_MULT18 + 1) + 3 * slice_pitch;
g.push_back(el);
}
if (wire_type == id_WIRE_TYPE_ALU54) {
GraphicElement el;
el.type = GraphicElement::TYPE_LINE;
el.style = style;
el.x1 = x + slice_x1 - 0.005f;
el.x2 = x + slice_x1;
el.y1 = y + slice_y2 - 0.00085f * (tilewire - TILE_WIRE_JCLK0_ALU54 + 1) + 3 * slice_pitch;
el.y2 = y + slice_y2 - 0.00085f * (tilewire - TILE_WIRE_JCLK0_ALU54 + 1) + 3 * slice_pitch;
g.push_back(el);
}
if (wire_type == id_WIRE_TYPE_V01) {
if (tilewire >= TILE_WIRE_V01N0001 && tilewire <= TILE_WIRE_V01S0100) {
GraphicElement el;
@ -384,6 +480,16 @@ void gfxTileWire(std::vector<GraphicElement> &g, int x, int y, int w, int h, IdS
}
}
}
if (tilewire >= TILE_WIRE_JCE0 && tilewire <= TILE_WIRE_JQ7) {
GraphicElement el;
el.type = GraphicElement::TYPE_LINE;
el.style = style;
el.x1 = x + switchbox_x2;
el.x2 = x + slice_x1 - 0.0025f;
el.y1 = y + slice_y2 - 0.0017f * (tilewire - TILE_WIRE_JCE0 + 1) + 3 * slice_pitch;
el.y2 = y + slice_y2 - 0.0017f * (tilewire - TILE_WIRE_JCE0 + 1) + 3 * slice_pitch;
g.push_back(el);
}
if (tilewire >= TILE_WIRE_FCO && tilewire <= TILE_WIRE_FCI) {
int gap = (tilewire - TILE_WIRE_FCO) / 24;

1116
ecp5/gfx.h
View File

File diff suppressed because it is too large Load Diff

21
ecp5/trellis_import.py
View File

@ -50,6 +50,27 @@ def wire_type(name):
if name[0].endswith("_SLICE"):
return "WIRE_TYPE_SLICE"
if name[0].endswith("_DQS"):
return "WIRE_TYPE_DQS"
if name[0].endswith("_IOLOGIC"):
return "WIRE_TYPE_IOLOGIC"
if name[0].endswith("_PIO"):
return "WIRE_TYPE_PIO"
if name[0].endswith("_DDRDLL"):
return "WIRE_TYPE_DDRDLL"
if name[0].endswith("_EBR"):
return "WIRE_TYPE_EBR"
if name[0].endswith("_MULT18"):
return "WIRE_TYPE_MULT18"
if name[0].endswith("_ALU54"):
return "WIRE_TYPE_ALU54"
if name[0].startswith("H00"):
return "WIRE_TYPE_H00"