Gowin. Implement MIPI IO.
Adds output (MIPI_OBUF and MIPI_OBUF_A) and input (MIPI_IBUF) primitives to allow the use of “real” MIPI (not emulation) ports capable of operating in both HS and LP modes. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
This commit is contained in:
YRabbit
parent
1623243d50
commit
17089994f1
@ -1313,6 +1313,16 @@ X(LSREN)
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// EMCU
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X(EMCU)
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// MIPI
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X(IL)
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X(OH)
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X(OL)
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X(OENB)
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X(MIPI_IBUF)
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X(MIPI_OBUF)
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X(MIPI_OBUF_A)
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X(MODESEL)
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// Register placement options
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X(IREG_IN_IOB)
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X(OREG_IN_IOB)
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@ -243,6 +243,10 @@ struct GowinGlobalRouter
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bool driver_is_dqce(const PortRef &driver) { return CellTypePort(driver) == CellTypePort(id_DQCE, id_CLKOUT); }
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bool driver_is_dcs(const PortRef &driver) { return CellTypePort(driver) == CellTypePort(id_DCS, id_CLKOUT); }
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bool driver_is_dhcen(const PortRef &driver) { return CellTypePort(driver) == CellTypePort(id_DHCEN, id_CLKOUT); }
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bool driver_is_mipi(const PortRef &driver)
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{
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return CellTypePort(driver) == CellTypePort(id_IOBUF, id_O) && driver.cell->params.count(id_MIPI_IBUF);
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}
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bool driver_is_clksrc(const PortRef &driver)
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{
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// dedicated pins
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@ -506,7 +510,7 @@ struct GowinGlobalRouter
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NPNR_ASSERT(net_before_dhcen != nullptr);
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PortRef driver = net_before_dhcen->driver;
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NPNR_ASSERT_MSG(driver_is_buf(driver) || driver_is_clksrc(driver),
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NPNR_ASSERT_MSG(driver_is_buf(driver) || driver_is_clksrc(driver) || driver_is_mipi(driver),
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stringf("The input source for %s is not a clock.", ctx->nameOf(dhcen_ci)).c_str());
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IdString port;
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@ -519,8 +523,14 @@ struct GowinGlobalRouter
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WireId src = ctx->getBelPinWire(driver.cell->bel, port);
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std::vector<PipId> path;
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RouteResult route_result = route_direct_net(
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net, [&](PipId pip, WireId src_wire) { return global_pip_filter(pip, src); }, src, &path);
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RouteResult route_result;
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if (driver_is_mipi(driver)) {
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route_result = route_direct_net(net, [&](PipId pip, WireId src_wire) { return true; }, src, &path);
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} else {
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route_result = route_direct_net(
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net, [&](PipId pip, WireId src_wire) { return global_pip_filter(pip, src); }, src, &path);
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}
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if (route_result == NOT_ROUTED) {
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log_error("Can't route the %s network.\n", ctx->nameOf(net));
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}
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@ -557,6 +567,9 @@ struct GowinGlobalRouter
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hw_dhcen->setAttr(id_DHCEN_USED, 1);
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dhcen_ci->copyPortTo(id_CE, hw_dhcen, id_CE);
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}
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if (driver_is_mipi(driver)) {
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ctx->bindWire(src, net_before_dhcen, STRENGTH_LOCKED);
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}
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// connect all users to upper level net
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std::vector<PortRef> users;
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@ -1,5 +1,5 @@
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#include <regex>
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#include <map>
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#include <regex>
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#include "himbaechel_api.h"
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#include "himbaechel_helpers.h"
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@ -110,7 +110,8 @@ struct GowinArch : HimbaechelArch
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bool match_device(const std::string &device) override { return device.size() > 2 && device.substr(0, 2) == "GW"; }
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std::unique_ptr<HimbaechelAPI> create(const std::string &device, const dict<std::string, std::string> &args) override
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std::unique_ptr<HimbaechelAPI> create(const std::string &device,
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const dict<std::string, std::string> &args) override
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{
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return std::make_unique<GowinImpl>();
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}
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@ -639,6 +640,9 @@ IdString GowinImpl::getBelBucketForCellType(IdString cell_type) const
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if (cell_type.in(id_IBUF, id_OBUF)) {
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return id_IOB;
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}
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if (cell_type.in(id_MIPI_OBUF, id_MIPI_OBUF_A)) {
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return id_MIPI_OBUF;
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}
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if (type_is_lut(cell_type)) {
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return id_LUT4;
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}
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@ -676,6 +680,9 @@ bool GowinImpl::isValidBelForCellType(IdString cell_type, BelId bel) const
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if (bel_type == id_IOB) {
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return cell_type.in(id_IBUF, id_OBUF);
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}
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if (bel_type == id_MIPI_OBUF) {
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return cell_type.in(id_MIPI_OBUF, id_MIPI_OBUF_A);
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}
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if (bel_type == id_LUT4) {
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return type_is_lut(cell_type);
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}
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@ -32,6 +32,10 @@ inline bool type_is_diffio(IdString cell_type)
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}
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inline bool is_diffio(const CellInfo *cell) { return type_is_diffio(cell->type); }
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// MIPI
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inline bool type_is_mipi(IdString cell_type) { return cell_type.in(id_MIPI_OBUF, id_MIPI_OBUF_A, id_MIPI_IBUF); }
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inline bool is_mipi(const CellInfo *cell) { return type_is_mipi(cell->type); }
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// IOLOGIC input and output separately
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inline bool type_is_iologico(IdString cell_type)
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@ -199,6 +203,9 @@ enum
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EMCU_Z = 300,
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MIPIOBUF_Z = 301,
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MIPIIBUF_Z = 302,
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// The two least significant bits encode Z for 9-bit adders and
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// multipliers, if they are equal to 0, then we get Z of their common
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// 18-bit equivalent.
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@ -55,9 +55,11 @@ DHCEN_Z = 288 # : 298
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USERFLASH_Z = 298
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EMCU_Z = 300
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MIPIOBUF_Z = 301
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MIPIIBUF_Z = 302
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DSP_Z = 509
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DSP_0_Z = 511 # DSP macro 0
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@ -580,6 +582,23 @@ def create_extra_funcs(tt: TileType, db: chipdb, x: int, y: int):
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tt.add_bel_pin(bel, port, wire, PinType.OUTPUT)
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else:
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tt.add_bel_pin(bel, port, wire, PinType.INPUT)
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elif func == 'mipi_obuf':
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bel = tt.create_bel('MIPI_OBUF', 'MIPI_OBUF', MIPIOBUF_Z)
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elif func == 'mipi_ibuf':
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bel = tt.create_bel('MIPI_IBUF', 'MIPI_IBUF', MIPIIBUF_Z)
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wire = desc['HSREN']
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if not tt.has_wire(wire):
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tt.create_wire(wire)
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tt.add_bel_pin(bel, 'HSREN', wire, PinType.INPUT)
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wire = 'MIPIOL'
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if not tt.has_wire(wire):
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tt.create_wire(wire)
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tt.add_bel_pin(bel, 'OL', wire, PinType.OUTPUT)
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for i in range(2):
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wire = f'MIPIEN{i}'
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if not tt.has_wire(wire):
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tt.create_wire(wire)
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tt.add_bel_pin(bel, f'MIPIEN{i}', wire, PinType.INPUT)
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elif func == 'buf':
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for buf_type, wires in desc.items():
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for i, wire in enumerate(wires):
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@ -266,6 +266,14 @@ struct GowinPacker
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iob_n->disconnectPort(id_OEN);
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iob_p->disconnectPort(id_OEN);
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ci.movePortTo(id_OEN, iob_p, id_OEN);
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// MIPI
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if (ci.params.count(id_MIPI_OBUF)) {
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iob_p->setParam(id_MIPI_OBUF, 1);
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iob_n->setParam(id_MIPI_OBUF, 1);
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ci.movePortTo(id_IB, iob_n, id_I);
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iob_p->copyPortTo(id_OEN, iob_n, id_OEN);
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}
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}
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iob_p->disconnectPort(id_I);
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ci.movePortTo(id_I, iob_p, id_I);
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@ -300,6 +308,152 @@ struct GowinPacker
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}
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}
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// ===================================
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// MIPI IO
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// ===================================
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void pack_mipi(void)
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{
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log_info("Pack MIPI IOs...\n");
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std::vector<std::unique_ptr<CellInfo>> new_cells;
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for (auto &cell : ctx->cells) {
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CellInfo &ci = *cell.second;
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if (!is_mipi(&ci)) {
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continue;
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}
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switch (ci.type.hash()) {
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case ID_MIPI_OBUF_A: /* fallt-hrough */
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case ID_MIPI_OBUF: {
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// check for MIPI-capable pin
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CellInfo *out_iob = net_only_drives(ctx, ci.ports.at(id_O).net, is_iob, id_I, true);
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if (out_iob == nullptr || out_iob->bel == BelId()) {
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log_error("MIPI %s is not connected to the output pin or the pin is not constrained.\n",
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ctx->nameOf(&ci));
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}
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BelId iob_bel = out_iob->bel;
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Loc iob_loc = ctx->getBelLocation(iob_bel);
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iob_loc.z = BelZ::MIPIOBUF_Z;
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BelId mipi_bel = ctx->getBelByLocation(iob_loc);
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if (mipi_bel == BelId()) {
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log_error("Can't place MIPI %s at X%dY%d/IOBA.\n", ctx->nameOf(&ci), iob_loc.x, iob_loc.y);
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}
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if (ci.type == id_MIPI_OBUF_A) {
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// if serialization is used then IL and input of serializator must be in the same network
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NetInfo *i_net = ci.getPort(id_I);
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NetInfo *il_net = ci.getPort(id_IL);
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if (i_net != il_net) {
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if (i_net != nullptr && is_iologico(i_net->driver.cell)) {
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if (i_net->driver.cell->getPort(id_D0) != ci.getPort(id_IL)) {
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log_error("MIPI %s port IL and IOLOGIC %s port D0 are in differrent networks!\n",
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ctx->nameOf(&ci), ctx->nameOf(i_net->driver.cell));
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}
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} else {
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log_error("MIPI %s ports IL and I are in differrent networks!\n", ctx->nameOf(&ci));
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}
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}
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ci.disconnectPort(id_IL);
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}
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ctx->bindBel(mipi_bel, &ci, PlaceStrength::STRENGTH_LOCKED);
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// Create TBUF with additional input IB
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IdString mipi_tbuf_name = gwu.create_aux_name(ci.name);
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new_cells.push_back(gwu.create_cell(mipi_tbuf_name, id_TLVDS_TBUF));
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CellInfo *mipi_tbuf = new_cells.back().get();
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mipi_tbuf->addInput(id_I);
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mipi_tbuf->addInput(id_IB);
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mipi_tbuf->addOutput(id_O);
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mipi_tbuf->addOutput(id_OB);
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mipi_tbuf->addInput(id_OEN);
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ci.movePortTo(id_I, mipi_tbuf, id_I);
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ci.movePortTo(id_IB, mipi_tbuf, id_IB);
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ci.movePortTo(id_O, mipi_tbuf, id_O);
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ci.movePortTo(id_OB, mipi_tbuf, id_OB);
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ci.movePortTo(id_MODESEL, mipi_tbuf, id_OEN);
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mipi_tbuf->setParam(id_MIPI_OBUF, 1);
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} break;
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case ID_MIPI_IBUF: {
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// check for MIPI-capable pin A
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CellInfo *in_iob = net_only_drives(ctx, ci.ports.at(id_IO).net, is_iob, id_I);
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if (in_iob == nullptr || in_iob->bel == BelId()) {
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log_error("MIPI %s IO is not connected to the input pin or the pin is not constrained.\n",
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ctx->nameOf(&ci));
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}
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// check A IO placing
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BelId iob_bel = in_iob->bel;
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Loc iob_loc = ctx->getBelLocation(iob_bel);
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if (iob_loc.z != BelZ::IOBA_Z) {
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log_error("MIPI %s IO pin must be connected to the A IO pin.\n", ctx->nameOf(&ci));
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}
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iob_loc.z = BelZ::MIPIIBUF_Z;
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BelId mipi_bel = ctx->getBelByLocation(iob_loc);
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if (mipi_bel == BelId()) {
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log_error("Can't place MIPI %s at X%dY%d/IOBA.\n", ctx->nameOf(&ci), iob_loc.x, iob_loc.y);
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}
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// check for MIPI-capable pin B
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CellInfo *inb_iob = net_only_drives(ctx, ci.ports.at(id_IOB).net, is_iob, id_I);
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if (inb_iob == nullptr || inb_iob->bel == BelId()) {
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log_error("MIPI %s IOB is not connected to the input pin or the pin is not constrained.\n",
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ctx->nameOf(&ci));
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}
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// check B IO placing
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BelId iobb_bel = inb_iob->bel;
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Loc iobb_loc = ctx->getBelLocation(iobb_bel);
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if (iobb_loc.z != BelZ::IOBB_Z || iobb_loc.x != iob_loc.x || iobb_loc.y != iob_loc.y) {
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log_error("MIPI %s IOB pin must be connected to the B IO pin.\n", ctx->nameOf(&ci));
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}
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// MIPI IBUF uses next pair of IOs too
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Loc iob_next_loc(iob_loc);
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++iob_next_loc.x;
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iob_next_loc.z = BelZ::IOBA_Z;
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CellInfo *inc_iob = ctx->getBoundBelCell(ctx->getBelByLocation(iob_next_loc));
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iob_next_loc.z = BelZ::IOBB_Z;
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CellInfo *other_cell_b = ctx->getBoundBelCell(ctx->getBelByLocation(iob_next_loc));
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if (inc_iob != nullptr || other_cell_b != nullptr) {
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log_error("MIPI %s cannot be placed in same IO with %s.\n", ctx->nameOf(&ci),
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inc_iob == nullptr ? ctx->nameOf(other_cell_b) : ctx->nameOf(inc_iob));
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}
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ctx->bindBel(mipi_bel, &ci, PlaceStrength::STRENGTH_LOCKED);
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// reconnect wires
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// A
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ci.disconnectPort(id_IO);
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in_iob->disconnectPort(id_I);
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ci.movePortTo(id_I, in_iob, id_I);
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ci.movePortTo(id_OH, in_iob, id_O);
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in_iob->disconnectPort(id_OEN);
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ci.movePortTo(id_OEN, in_iob, id_OEN);
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// B
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ci.disconnectPort(id_IO);
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inb_iob->disconnectPort(id_I);
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ci.movePortTo(id_IB, inb_iob, id_I);
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ci.movePortTo(id_OB, inb_iob, id_O);
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inb_iob->disconnectPort(id_OEN);
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ci.movePortTo(id_OENB, inb_iob, id_OEN);
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// MIPI enable (?)
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ci.addInput(ctx->id("MIPIEN0"));
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ci.connectPort(ctx->id("MIPIEN0"), ctx->nets.at(ctx->id("$PACKER_GND")).get());
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ci.addInput(ctx->id("MIPIEN1"));
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ci.connectPort(ctx->id("MIPIEN1"), ctx->nets.at(ctx->id("$PACKER_VCC")).get());
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in_iob->setParam(id_MIPI_IBUF, 1);
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inb_iob->setParam(id_MIPI_IBUF, 1);
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} break;
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default:
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log_error("MIPI %s is not implemented.\n", ci.type.c_str(ctx));
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}
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}
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for (auto &ncell : new_cells) {
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ctx->cells[ncell->name] = std::move(ncell);
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}
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}
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void pack_diff_iobs(void)
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{
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log_info("Pack diff IOBs...\n");
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@ -432,7 +586,8 @@ struct GowinPacker
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}
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// mark IOB as used by IOLOGIC
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out_iob->setParam(id_IOLOGIC_IOB, 1);
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check_iologic_placement(ci, ctx->getBelLocation(iob_bel), out_iob->params.count(id_DIFF_TYPE));
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check_iologic_placement(ci, ctx->getBelLocation(iob_bel),
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out_iob->params.count(id_DIFF_TYPE) || out_iob->params.count(id_MIPI_OBUF));
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if (!ctx->checkBelAvail(l_bel)) {
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log_error("Can't place %s at %s because it's already taken by %s\n", ctx->nameOf(&ci),
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@ -471,6 +626,20 @@ struct GowinPacker
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nets_to_remove.push_back(ci.getPort(tx_port)->name);
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out_iob->disconnectPort(id_OEN);
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ci.disconnectPort(tx_port);
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} else { // disconnect TXx ports, ignore these nets
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switch (ci.type.hash()) {
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case ID_OSER8:
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ci.disconnectPort(id_TX3);
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ci.disconnectPort(id_TX2); /* fall-through */
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case ID_OSER4:
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ci.disconnectPort(id_TX1);
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ci.disconnectPort(id_TX0);
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break;
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case ID_ODDR: /* fall-through */
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case ID_ODDRC: /* fall-through */
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ci.disconnectPort(id_TX);
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break;
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}
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}
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make_iob_nets(*out_iob);
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}
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@ -489,7 +658,8 @@ struct GowinPacker
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}
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// mark IOB as used by IOLOGIC
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out_iob->setParam(id_IOLOGIC_IOB, 1);
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check_iologic_placement(ci, ctx->getBelLocation(iob_bel), out_iob->params.count(id_DIFF_TYPE));
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check_iologic_placement(ci, ctx->getBelLocation(iob_bel),
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out_iob->params.count(id_DIFF_TYPE) || out_iob->params.count(id_MIPI_OBUF));
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if (!ctx->checkBelAvail(l_bel)) {
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log_error("Can't place %s at %s because it's already taken by %s\n", ctx->nameOf(&ci),
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@ -534,6 +704,11 @@ struct GowinPacker
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}
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bool is_diff_io(BelId bel) { return ctx->getBoundBelCell(bel)->params.count(id_DIFF_TYPE) != 0; }
|
||||
bool is_mipi_io(BelId bel)
|
||||
{
|
||||
return ctx->getBoundBelCell(bel)->params.count(id_MIPI_IBUF) ||
|
||||
ctx->getBoundBelCell(bel)->params.count(id_MIPI_OBUF);
|
||||
}
|
||||
|
||||
CellInfo *create_aux_iologic_cell(CellInfo &ci, IdString mode, bool io16 = false, int idx = 0)
|
||||
{
|
||||
@ -545,7 +720,7 @@ struct GowinPacker
|
||||
BelId bel = get_aux_iologic_bel(ci);
|
||||
BelId io_bel = gwu.get_io_bel_from_iologic(bel);
|
||||
if (!ctx->checkBelAvail(io_bel)) {
|
||||
if (!is_diff_io(io_bel)) {
|
||||
if (!(is_diff_io(io_bel) || is_mipi_io(io_bel))) {
|
||||
log_error("Can't place %s at %s because of a conflict with another IO %s\n", ctx->nameOf(&ci),
|
||||
ctx->nameOfBel(bel), ctx->nameOf(ctx->getBoundBelCell(io_bel)));
|
||||
}
|
||||
@ -609,7 +784,8 @@ struct GowinPacker
|
||||
}
|
||||
// mark IOB as used by IOLOGIC
|
||||
in_iob->setParam(id_IOLOGIC_IOB, 1);
|
||||
check_iologic_placement(ci, ctx->getBelLocation(iob_bel), in_iob->params.count(id_DIFF_TYPE));
|
||||
check_iologic_placement(ci, ctx->getBelLocation(iob_bel),
|
||||
in_iob->params.count(id_DIFF_TYPE) || in_iob->params.count(id_MIPI_IBUF));
|
||||
|
||||
if (!ctx->checkBelAvail(l_bel)) {
|
||||
log_error("Can't place %s at %s because it's already taken by %s\n", ctx->nameOf(&ci),
|
||||
@ -3932,6 +4108,9 @@ struct GowinPacker
|
||||
pack_iobs();
|
||||
ctx->check();
|
||||
|
||||
pack_mipi();
|
||||
ctx->check();
|
||||
|
||||
pack_diff_iobs();
|
||||
ctx->check();
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user