ice40: Add examples folder including floorplan example

Signed-off-by: David Shah <dave@ds0.me>
This commit is contained in:
David Shah 2018-12-14 13:41:28 +00:00
parent 0118ac00c4
commit 1780f42b9a
11 changed files with 42 additions and 0 deletions

4
ice40/examples/floorplan/.gitignore vendored Normal file
View File

@ -0,0 +1,4 @@
*.json
*.asc
*.bin
__pycache__

View File

@ -0,0 +1,5 @@
ctx.createRectangularRegion("osc", 1, 1, 1, 4)
for cell, cellinfo in ctx.cells:
if "ringosc" in cellinfo.attrs:
print("Floorplanned cell %s" % cell)
ctx.constrainCellToRegion(cell, "osc")

View File

@ -0,0 +1,6 @@
#!/usr/bin/env bash
set -ex
yosys -p "synth_ice40 -top top -json floorplan.json" floorplan.v
../../../nextpnr-ice40 --up5k --json floorplan.json --pcf icebreaker.pcf --asc floorplan.asc --ignore-loops --pre-place floorplan.py
icepack floorplan.asc floorplan.bin
iceprog floorplan.bin

View File

@ -0,0 +1,22 @@
module top(output LED1, LED2, LED3, LED4, LED5);
localparam N = 31;
wire [N:0] x;
assign x[0] = x[N];
genvar ii;
generate
for (ii = 0; ii < N; ii = ii + 1) begin
(* ringosc *)
SB_LUT4 #(.LUT_INIT(1)) lut_i(.I0(x[ii]), .I1(), .I2(), .I3(), .O(x[ii+1]));
end
endgenerate
assign clk = x[N];
reg [19:0] ctr;
always @(posedge clk)
ctr <= ctr + 1'b1;
assign {LED5, LED4, LED3, LED2, LED1} = ctr[19:15];
endmodule

View File

@ -0,0 +1,5 @@
set_io -nowarn LED1 26
set_io -nowarn LED2 27
set_io -nowarn LED3 25
set_io -nowarn LED4 23
set_io -nowarn LED5 21