interchange: Handle disconnected/missing cell pins
Signed-off-by: gatecat <gatecat@ds0.me>
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872b3aa63d
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18459a9e4c
@ -727,6 +727,7 @@ bool Arch::pack()
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decode_lut_cells();
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decode_lut_cells();
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merge_constant_nets();
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merge_constant_nets();
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pack_ports();
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pack_ports();
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pack_default_conns();
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return true;
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return true;
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}
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}
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@ -1984,6 +1985,58 @@ DelayQuad Arch::getPipDelay(PipId pip) const
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return DelayQuad(100 * (1 + pip_data.pseudo_cell_wires.size()));
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return DelayQuad(100 * (1 + pip_data.pseudo_cell_wires.size()));
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}
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}
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const DefaultCellConnsPOD *Arch::get_default_conns(IdString cell_type) const
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{
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for (const auto &conn : chip_info->constants->default_conns) {
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if (IdString(conn.cell_type) == cell_type)
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return &conn;
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}
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return nullptr;
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}
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void Arch::pack_default_conns()
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{
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IdString vcc_net_name(chip_info->constants->vcc_net_name);
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IdString gnd_net_name(chip_info->constants->gnd_net_name);
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Context *ctx = getCtx();
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std::vector<IdString> dead_nets;
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for (auto cell : sorted(ctx->cells)) {
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CellInfo *ci = cell.second;
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const DefaultCellConnsPOD *conns = get_default_conns(ci->type);
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if (conns == nullptr)
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continue;
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for (const auto &pin : conns->pins) {
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IdString pin_name(pin.pin_name);
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// pin missing, create it
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if (!ci->ports.count(pin_name))
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ci->addInput(pin_name);
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const NetInfo *net = ci->ports.at(pin_name).net;
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if (net != nullptr) {
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// pin is connected, and driven, nothing to do
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if (net->driver.cell != nullptr)
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continue;
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// pin is connected but undriven, disconnect the existing net
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ctx->disconnectPort(ci->name, pin_name);
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// remove net if it has no remaining users
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if (net->users.empty())
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dead_nets.push_back(net->name);
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}
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if (pin.value == PIN_VALUE_GND)
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ctx->connectPort(gnd_net_name, ci->name, pin_name);
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else if (pin.value == PIN_VALUE_VCC)
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ctx->connectPort(vcc_net_name, ci->name, pin_name);
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else
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NPNR_ASSERT(pin.value == PIN_VALUE_FLOAT);
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}
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}
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// Remove any left-behind nets with no users and no drivers
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for (auto net : dead_nets)
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ctx->nets.erase(net);
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}
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// Instance constraint templates.
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// Instance constraint templates.
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template void Arch::ArchConstraints::bindBel(Arch::ArchConstraints::TagState *, const Arch::ConstraintRange);
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template void Arch::ArchConstraints::bindBel(Arch::ArchConstraints::TagState *, const Arch::ConstraintRange);
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template void Arch::ArchConstraints::unbindBel(Arch::ArchConstraints::TagState *, const Arch::ConstraintRange);
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template void Arch::ArchConstraints::unbindBel(Arch::ArchConstraints::TagState *, const Arch::ConstraintRange);
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@ -1100,6 +1100,9 @@ struct Arch : ArchAPI<ArchRanges>
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void unmask_bel_pins();
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void unmask_bel_pins();
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void explain_bel_status(BelId bel) const;
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void explain_bel_status(BelId bel) const;
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const DefaultCellConnsPOD *get_default_conns(IdString cell_type) const;
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void pack_default_conns();
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};
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};
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NEXTPNR_NAMESPACE_END
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NEXTPNR_NAMESPACE_END
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@ -1065,12 +1065,6 @@ ModuleReader::ModuleReader(const LogicalNetlistImpl *root,
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if(iter == net_indicies.end()) {
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if(iter == net_indicies.end()) {
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PortKey port_key = port_connections.first;
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PortKey port_key = port_connections.first;
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auto port = ports[port_key.port_idx];
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auto port = ports[port_key.port_idx];
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if(port_key.inst_idx != -1 && port.getDir() != LogicalNetlist::Netlist::Direction::OUTPUT) {
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log_error("Cell instance %s port %s is disconnected!\n",
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root->strings.at(root->root.getInstList()[port_key.inst_idx].getName()).c_str(),
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root->strings.at(ports[port_key.port_idx].getName()).c_str()
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);
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}
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disconnected_nets[net_idx] = stringf("%s.%d", root->strings.at(port.getName()).c_str(), i);
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disconnected_nets[net_idx] = stringf("%s.%d", root->strings.at(port.getName()).c_str(), i);
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}
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}
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}
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}
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