From 1b20835b9a0a5d326f17db0bc771172da9926467 Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Thu, 22 Aug 2024 09:41:11 +0200 Subject: [PATCH] Cleanup --- himbaechel/uarch/ng-ultra/ng_ultra.cc | 17 ++--- himbaechel/uarch/ng-ultra/ng_ultra.h | 2 +- himbaechel/uarch/ng-ultra/pack.cc | 100 ++++---------------------- himbaechel/uarch/ng-ultra/pack.h | 1 + 4 files changed, 20 insertions(+), 100 deletions(-) diff --git a/himbaechel/uarch/ng-ultra/ng_ultra.cc b/himbaechel/uarch/ng-ultra/ng_ultra.cc index 5a43f5d2..7d132827 100644 --- a/himbaechel/uarch/ng-ultra/ng_ultra.cc +++ b/himbaechel/uarch/ng-ultra/ng_ultra.cc @@ -116,9 +116,9 @@ void NgUltraImpl::init(Context *ctx) namespace { // Note: These are per Cell type not Bel type // Sinks -const dict> fabric_clock_sinks = { +const dict> fabric_lowskew_sinks = { // TILE - DFF - { id_BEYOND_FE, { id_CK }}, + { id_BEYOND_FE, { id_CK, id_L, id_R }}, // { id_DFF, { id_CK }}, // This is part of BEYOND_FE // TILE - Register file { id_RF, { id_WCK }}, @@ -166,11 +166,6 @@ const dict> tube_clock_sinks = { // TUBE { id_GCK, { id_SI1, id_SI2 }}, }; - -const dict> fabric_lowskew_sinks = { - // TILE - DFF - { id_BEYOND_FE, { id_L, id_R }}, -}; // Sources // CKG const dict> ring_clock_source = { @@ -189,15 +184,11 @@ const dict> tube_clock_source = { }; -bool NgUltraImpl::is_fabric_clock_sink(const PortRef &ref) -{ - return fabric_clock_sinks.count(ref.cell->type) && fabric_clock_sinks.at(ref.cell->type).count(ref.port); -} +const dict>& NgUltraImpl::get_fabric_lowskew_sinks() { return fabric_lowskew_sinks; } bool NgUltraImpl::is_fabric_lowskew_sink(const PortRef &ref) { - if (fabric_lowskew_sinks.count(ref.cell->type) && fabric_lowskew_sinks.at(ref.cell->type).count(ref.port)) return true; - return is_fabric_clock_sink(ref); + return fabric_lowskew_sinks.count(ref.cell->type) && fabric_lowskew_sinks.at(ref.cell->type).count(ref.port); } bool NgUltraImpl::is_ring_clock_sink(const PortRef &ref) diff --git a/himbaechel/uarch/ng-ultra/ng_ultra.h b/himbaechel/uarch/ng-ultra/ng_ultra.h index b882dc2e..3b9df650 100644 --- a/himbaechel/uarch/ng-ultra/ng_ultra.h +++ b/himbaechel/uarch/ng-ultra/ng_ultra.h @@ -74,7 +74,7 @@ public: IdString tile_name_id(int tile) const; std::string tile_name(int tile) const; - bool is_fabric_clock_sink(const PortRef &ref); + const dict>& get_fabric_lowskew_sinks(); bool is_fabric_lowskew_sink(const PortRef &ref); bool is_ring_clock_sink(const PortRef &ref); bool is_ring_over_tile_clock_sink(const PortRef &ref); diff --git a/himbaechel/uarch/ng-ultra/pack.cc b/himbaechel/uarch/ng-ultra/pack.cc index 8c60b9a7..daf002f6 100644 --- a/himbaechel/uarch/ng-ultra/pack.cc +++ b/himbaechel/uarch/ng-ultra/pack.cc @@ -2144,86 +2144,16 @@ void NgUltraPacker::extract_lowskew_signals(CellInfo *cell, dicttile_name_id(cell->bel.tile); PortRef ref; - ref.cell = cell; - if (cell->type == id_BEYOND_FE) { - NetInfo *clock = cell->getPort(id_CK); - NetInfo *load = cell->getPort(id_L); - NetInfo *reset = cell->getPort(id_R); - if (clock && !global_lowskew.count(clock->name)) { - ref.port = id_CK; - lowskew_signals[loc][clock->name].push_back(ref); + ref.cell = cell; + auto &sinks = uarch->get_fabric_lowskew_sinks(); + if (sinks.count(cell->type)) { + for(auto &port : sinks.at(cell->type)) { + NetInfo *clock = cell->getPort(port); + if (clock && !global_lowskew.count(clock->name)) { + ref.port = port; + lowskew_signals[loc][clock->name].push_back(ref); + } } - if (load && !global_lowskew.count(load->name)) { - ref.port = id_L; - lowskew_signals[loc][load->name].push_back(ref); - } - if (reset && !global_lowskew.count(reset->name)) { - ref.port = id_R; - lowskew_signals[loc][reset->name].push_back(ref); - } - } else if (cell->type.in(id_RF,id_RFSP)) { - NetInfo *clock = cell->getPort(id_WCK); - ref.port = id_WCK; - if (clock && !global_lowskew.count(clock->name)) - lowskew_signals[loc][clock->name].push_back(ref); - } else if (cell->type.in(id_XHRF,id_XWRF,id_XPRF)) { - NetInfo *clock = cell->getPort(id_WCK1); - ref.port = id_WCK1; - if (clock && !global_lowskew.count(clock->name)) - lowskew_signals[loc][clock->name].push_back(ref); - clock = cell->getPort(id_WCK2); - ref.port = id_WCK2; - if (clock && !global_lowskew.count(clock->name)) - lowskew_signals[loc][clock->name].push_back(ref); - } else if (cell->type.in(id_RAM)) { - NetInfo *clock = cell->getPort(id_ACK); - ref.port = id_ACK; - if (clock && !global_lowskew.count(clock->name)) - lowskew_signals[loc][clock->name].push_back(ref); - clock = cell->getPort(id_BCK); - ref.port = id_BCK; - if (clock && !global_lowskew.count(clock->name)) - lowskew_signals[loc][clock->name].push_back(ref); - } else if (cell->type.in(id_CDC,id_DDE,id_TDE,id_XCDC)) { - NetInfo *clock = cell->getPort(id_CK1); - ref.port = id_CK1; - if (clock && !global_lowskew.count(clock->name)) - lowskew_signals[loc][clock->name].push_back(ref); - clock = cell->getPort(id_CK2); - ref.port = id_CK2; - if (clock && !global_lowskew.count(clock->name)) - lowskew_signals[loc][clock->name].push_back(ref); - } else if (cell->type.in(id_FIFO)) { - NetInfo *clock = cell->getPort(id_RCK); - ref.port = id_RCK; - if (clock && !global_lowskew.count(clock->name)) - lowskew_signals[loc][clock->name].push_back(ref); - clock = cell->getPort(id_WCK); - ref.port = id_WCK; - if (clock && !global_lowskew.count(clock->name)) - lowskew_signals[loc][clock->name].push_back(ref); - } else if (cell->type.in(id_XHFIFO,id_XWFIFO)) { - NetInfo *clock = cell->getPort(id_RCK1); - ref.port = id_RCK1; - if (clock && !global_lowskew.count(clock->name)) - lowskew_signals[loc][clock->name].push_back(ref); - clock = cell->getPort(id_RCK2); - ref.port = id_RCK2; - if (clock && !global_lowskew.count(clock->name)) - lowskew_signals[loc][clock->name].push_back(ref); - clock = cell->getPort(id_WCK1); - ref.port = id_WCK1; - if (clock && !global_lowskew.count(clock->name)) - lowskew_signals[loc][clock->name].push_back(ref); - clock = cell->getPort(id_WCK2); - ref.port = id_WCK2; - if (clock && !global_lowskew.count(clock->name)) - lowskew_signals[loc][clock->name].push_back(ref); - } else if (cell->type.in(id_DSP)) { - NetInfo *clock = cell->getPort(id_CK); - ref.port = id_CK; - if (clock && !global_lowskew.count(clock->name)) - lowskew_signals[loc][clock->name].push_back(ref); } } @@ -2351,7 +2281,6 @@ void NgUltraPacker::pre_place(void) log_info("Adding GCK for lowskew signals..\n"); for(auto &n : lowskew_signals[IdString()]) { - //printf("\t%ld --- %s\n", n.second.size(),n.first.c_str(ctx)); NetInfo *net = ctx->nets.at(n.first).get(); if (net->driver.cell->type.in(id_BFR,id_DFR,id_DDFR)) { CellInfo *bfr = net->driver.cell; @@ -2458,7 +2387,8 @@ void NgUltraImpl::postPlace() ctx->assignArchInfo(); } -BelId getCSC(Context *ctx, Loc l, int row) { +BelId NgUltraPacker::getCSC(Loc l, int row) +{ BelId bel = ctx->getBelByLocation(Loc(l.x+1,l.y+2,0)); if (!ctx->getBoundBelCell(bel) && (row==0 || row==1)) return bel; bel = ctx->getBelByLocation(Loc(l.x+1,l.y+2,15)); @@ -2502,7 +2432,6 @@ void NgUltraPacker::insert_csc() } } for(auto &lsm : local_system_matrix) { - //printf("name:%s\n",lsm.first.c_str(ctx)); std::string name = lsm.first.c_str(ctx); Loc loc = uarch->tile_locations[name]; std::vector> fanout; @@ -2518,7 +2447,7 @@ void NgUltraPacker::insert_csc() NetInfo *net = ctx->nets.at(n.second).get(); CellInfo *cell = net->driver.cell; if (uarch->tile_name(cell->bel.tile) == lsm.first.c_str(ctx) && !cell->params.count(id_dff_used) && cell->cluster == ClusterId()) { - BelId newbel = getCSC(ctx,loc,0); + BelId newbel = getCSC(loc,0); if (newbel==BelId()) break; ctx->unbindBel(cell->bel); @@ -2536,8 +2465,8 @@ void NgUltraPacker::insert_csc() continue; } Loc cell_loc = ctx->getBelLocation(cell->bel); - BelId newbel = getCSC(ctx,loc,(cell_loc.y & 3)+1); // Take CSC from pefered row - if (newbel==BelId()) newbel = getCSC(ctx,loc,0); // Try getting any other CSC + BelId newbel = getCSC(loc,(cell_loc.y & 3)+1); // Take CSC from pefered row + if (newbel==BelId()) newbel = getCSC(loc,0); // Try getting any other CSC if (newbel==BelId()) break; CellInfo *fe = create_cell_ptr(id_BEYOND_FE, ctx->id(net->name.str(ctx) + "$" + lsm.first.c_str(ctx) + "$csc")); @@ -2557,7 +2486,6 @@ void NgUltraPacker::insert_csc() conn.cell->connectPort(conn.port,new_out); ctx->bindBel(newbel, fe, PlaceStrength::STRENGTH_LOCKED); - //printf("\t%d --- %s %d %d\n", n.first,n.second.c_str(ctx),loc.x,loc.y); } } if (insert_new_csc) diff --git a/himbaechel/uarch/ng-ultra/pack.h b/himbaechel/uarch/ng-ultra/pack.h index 8dbe8d4a..51cb6e7e 100644 --- a/himbaechel/uarch/ng-ultra/pack.h +++ b/himbaechel/uarch/ng-ultra/pack.h @@ -97,6 +97,7 @@ TESTABLE_PRIVATE: void disconnect_unused(CellInfo *cell, IdString port); void bind_attr_loc(CellInfo *cell, dict *attrs); BelId get_available_gck(int lobe, NetInfo *si1, NetInfo *si2); + BelId getCSC(Loc l, int row); // General helper functions void flush_cells();