nexus: More pin styles and FASM pinmux gen

Signed-off-by: David Shah <dave@ds0.me>

common/util.h

@@ -121,6 +121,15 @@ template <typename K, typename V> std::map<K, V &> sorted_ref(std::unordered_map
     return retVal;
 };
 
+// Wrap an unordered_map, and allow it to be iterated over sorted by key
+template <typename K, typename V> std::map<K, const V &> sorted_cref(const std::unordered_map<K, V> &orig)
+{
+    std::map<K, const V &> retVal;
+    for (auto &item : orig)
+        retVal.emplace(std::make_pair(item.first, std::ref(item.second)));
+    return retVal;
+};
+
 // Wrap an unordered_set, and allow it to be iterated over sorted by key
 template <typename K> std::set<K> sorted(const std::unordered_set<K> &orig)
 {

nexus/arch.h

@@ -764,8 +764,8 @@ struct WireBelPinRange
 enum CellPinStyle
 {
     PINOPT_NONE = 0x0, // no options, just signal as-is
-    PINOPT_LO = 0x1,   // can be tied high
+    PINOPT_LO = 0x1,   // can be tied low
-    PINOPT_HI = 0x2,   // can be tied low
+    PINOPT_HI = 0x2,   // can be tied high
     PINOPT_INV = 0x4,  // can be inverted
 
     PINOPT_LOHI = 0x3,    // can be tied low or high
@@ -783,16 +783,22 @@ enum CellPinStyle
 
     PINGLB_MASK = 0x100,
 
-    PINSTYLE_NONE = 0x000, // default
+    PINBIT_GATED = 0x1000, // pin must be enabled in bitstream if used
-    PINSTYLE_CIB = 0x012,  // 'CIB' signal, floats high but explicitly zeroed if not used
+    PINBIT_1 = 0x2000,     // pin has an explicit bit that must be set if tied to 1
-    PINSTYLE_CLK = 0x107,  // CLK type signal, invertible and defaults to disconnected
-    PINSTYLE_CE = 0x027,   // CE type signal, invertible and defaults to enabled
-    PINSTYLE_LSR = 0x017,  // LSR type signal, invertible and defaults to not reset
-    PINSTYLE_DEDI = 0x000, // dedicated signals, leave alone
-    PINSTYLE_PU = 0x022,   // signals that float high and default high
 
-    PINSTYLE_INV_PD = 0x017, // invertible, pull down by default
+    PINSTYLE_NONE = 0x0000, // default
-    PINSTYLE_INV_PU = 0x027, // invertible, pull up by default
+    PINSTYLE_CIB = 0x0012,  // 'CIB' signal, floats high but explicitly zeroed if not used
+    PINSTYLE_CLK = 0x0107,  // CLK type signal, invertible and defaults to disconnected
+    PINSTYLE_CE = 0x0027,   // CE type signal, invertible and defaults to enabled
+    PINSTYLE_LSR = 0x0017,  // LSR type signal, invertible and defaults to not reset
+    PINSTYLE_DEDI = 0x0000, // dedicated signals, leave alone
+    PINSTYLE_PU = 0x0022,   // signals that float high and default high
+
+    PINSTYLE_INV_PD = 0x0017, // invertible, pull down by default
+    PINSTYLE_INV_PU = 0x0027, // invertible, pull up by default
+
+    PINSTYLE_IOL_CE = 0x2027, // CE type signal, with explicit 'const-1' config bit
+    PINSTYLE_GATE = 0x1011,   // gated signal that defaults to 0
 };
 
 // This represents the mux options for a pin
@@ -1365,7 +1371,7 @@ struct Arch : BaseCtx
     typedef std::unordered_map<IdString, CellPinStyle> CellPinsData;
 
     std::unordered_map<IdString, CellPinsData> cell_pins_db;
-    CellPinStyle get_cell_pin_style(CellInfo *cell, IdString port) const;
+    CellPinStyle get_cell_pin_style(const CellInfo *cell, IdString port) const;
 
     void init_cell_pin_data();
 

nexus/fasm.cc

@@ -184,6 +184,30 @@ struct NexusFasmWriter
             write_pip(p);
         blank();
     }
+    // Write out the mux config for a cell
+    void write_cell_muxes(const CellInfo *cell)
+    {
+        for (auto port : sorted_cref(cell->ports)) {
+            // Only relevant to inputs
+            if (port.second.type != PORT_IN)
+                continue;
+            auto pin_style = ctx->get_cell_pin_style(cell, port.first);
+            auto pin_mux = ctx->get_cell_pinmux(cell, port.first);
+            // Invertible pins
+            if (pin_style & PINOPT_INV) {
+                if (pin_mux == PINMUX_INV || pin_mux == PINMUX_0)
+                    write_bit(stringf("%sMUX.INV", ctx->nameOf(port.first)));
+                else if (pin_mux == PINMUX_SIG)
+                    write_bit(stringf("%sMUX.%s", ctx->nameOf(port.first), ctx->nameOf(port.first)));
+            }
+            // Pins that must be explictly enabled
+            if ((pin_style & PINBIT_GATED) && (pin_mux == PINMUX_SIG))
+                write_bit(stringf("%sMUX.%s", ctx->nameOf(port.first), ctx->nameOf(port.first)));
+            // Pins that must be explictly set to 1 rather than just left floating
+            if ((pin_style & PINBIT_1) && (pin_mux == PINMUX_1))
+                write_bit(stringf("%sMUX.1", ctx->nameOf(port.first)));
+        }
+    }
     // Write config for an OXIDE_COMB cell
     void write_comb(const CellInfo *cell)
     {

nexus/pins.cc

@@ -76,7 +76,7 @@ static const std::unordered_map<IdString, Arch::CellPinsData> base_cell_pin_data
 
 void Arch::init_cell_pin_data() { cell_pins_db = base_cell_pin_data; }
 
-CellPinStyle Arch::get_cell_pin_style(CellInfo *cell, IdString port) const
+CellPinStyle Arch::get_cell_pin_style(const CellInfo *cell, IdString port) const
 {
     // Look up the pin style in the cell database
     auto fnd_cell = cell_pins_db.find(cell->type);