wip stuff
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@ -440,6 +440,16 @@ PipId PipIterator::operator*() const {
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return ret;
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}
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BelPin BelPinIterator::operator*() const {
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BelPin ret;
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ret.bel.index = ptr->bel_idx;
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ret.bel.location = bel_loc;
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auto &bt = arch->getBelTypeInfo(ret.bel);
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ret.pin.index = bt.pins[ptr->pin_idx].name_id;
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return ret;
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}
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// -----------------------------------------------------------------------
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//
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// XXX package pins
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@ -160,6 +160,11 @@ NPNR_PACKED_STRUCT(struct BelTypePOD {
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int32_t num_conflicts;
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});
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NPNR_PACKED_STRUCT(struct TileTypeWireBelXrefPOD {
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int32_t bel_idx;
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int32_t pin_idx;
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});
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NPNR_PACKED_STRUCT(struct TileTypeWirePortXrefPOD {
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int32_t port_idx;
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int32_t wire_idx;
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@ -169,9 +174,9 @@ NPNR_PACKED_STRUCT(struct TileTypeWirePortXrefPOD {
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NPNR_PACKED_STRUCT(struct TileTypeWirePOD {
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int32_t name_id;
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int32_t type_name_id;
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// The BEL and pin this wire is attached to, if any.
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int32_t bel_idx;
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int32_t bel_pin_idx;
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// A list of bel pins referencing this wire.
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int32_t num_bel_xrefs;
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RelPtr<TileTypeWireBelXrefPOD> bel_xrefs;
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// A list of pips referencing this wire as dst.
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int32_t num_pip_dst_xrefs;
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RelPtr<int32_t> pip_dst_xrefs;
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@ -270,7 +275,7 @@ NPNR_PACKED_STRUCT(struct FamilyPOD {
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RelPtr<TileTypePOD> tile_types;
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});
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#define DB_FORMAT_TAG_CURRENT 0x2
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#define DB_FORMAT_TAG_CURRENT 0x3
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/************************ End of chipdb section. ************************/
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@ -327,21 +332,17 @@ struct BelRange
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// -----------------------------------------------------------------------
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struct Arch;
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struct BelPinIterator
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{
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BelId bel;
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IdString pin;
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const Arch *arch;
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const TileTypeWireBelXrefPOD *ptr = nullptr;
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Location bel_loc;
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void operator++() { ptr++; }
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bool operator!=(const BelPinIterator &other) const { return ptr != other.ptr; }
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void operator++() { bel = BelId(); }
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bool operator!=(const BelPinIterator &other) const { return bel != other.bel; }
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BelPin operator*() const
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{
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BelPin ret;
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ret.bel = bel;
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ret.pin = pin;
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return ret;
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}
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BelPin operator*() const;
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};
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struct BelPinRange
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@ -505,8 +506,6 @@ struct AllPipRange
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// -----------------------------------------------------------------------
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struct Arch;
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struct PipIterator
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{
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enum {
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@ -781,12 +780,10 @@ struct Arch : BaseCtx
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{
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BelPinRange res;
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auto &ttw = getTileTypeWire(wire);
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if (ttw.bel_idx != -1) {
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res.b.bel.location = wire.location;
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res.b.bel.index = ttw.bel_idx;
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auto &bt = getBelTypeInfo(res.b.bel);
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res.b.pin.index = bt.pins[ttw.bel_pin_idx].name_id;
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}
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res.b.ptr = ttw.bel_xrefs.get();
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res.e.ptr = ttw.bel_xrefs.get() + ttw.num_bel_xrefs;
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res.b.bel_loc = res.e.bel_loc = wire.location;
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res.b.arch = res.e.arch = this;
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return res;
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}
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41
leuctra/cells.h
Normal file
41
leuctra/cells.h
Normal file
@ -0,0 +1,41 @@
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/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2018 David Shah <david@symbioticeda.com>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#ifndef LEUCTRA_CELLS_H
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#define LEUCTRA_CELLS_H
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#include "nextpnr.h"
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NEXTPNR_NAMESPACE_BEGIN
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inline bool is_xilinx_iobuf(const BaseCtx *ctx, const CellInfo *cell) {
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return cell->type == ctx->id("IBUF")
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|| cell->type == ctx->id("IBUFDS")
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|| cell->type == ctx->id("IBUFDS_DIFF_OUT")
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|| cell->type == ctx->id("OBUF")
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|| cell->type == ctx->id("OBUFDS")
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|| cell->type == ctx->id("OBUFT")
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|| cell->type == ctx->id("OBUFTDS")
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|| cell->type == ctx->id("IOBUF")
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|| cell->type == ctx->id("IOBUFDS");
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}
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NEXTPNR_NAMESPACE_END
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#endif
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@ -18,14 +18,74 @@
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*/
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#include "nextpnr.h"
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#include "log.h"
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NEXTPNR_NAMESPACE_BEGIN
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static bool is_nextpnr_iob(Context *ctx, CellInfo *cell)
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{
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return cell->type == ctx->id("$nextpnr_ibuf") || cell->type == ctx->id("$nextpnr_obuf") ||
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cell->type == ctx->id("$nextpnr_iobuf");
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}
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class LeuctraPacker
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{
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public:
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LeuctraPacker(Context *ctx) : ctx(ctx){};
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private:
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// Process the contents of packed_cells and new_cells
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void flush_cells()
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{
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for (auto pcell : packed_cells) {
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ctx->cells.erase(pcell);
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}
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for (auto &ncell : new_cells) {
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ctx->cells[ncell->name] = std::move(ncell);
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}
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packed_cells.clear();
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new_cells.clear();
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}
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// Remove nextpnr iob cells, insert Xilinx primitives instead.
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void pack_iob()
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{
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log_info("Packing IOBs..\n");
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// XXX
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flush_cells();
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}
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public:
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void pack()
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{
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pack_iob();
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}
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private:
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Context *ctx;
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std::unordered_set<IdString> packed_cells;
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std::vector<std::unique_ptr<CellInfo>> new_cells;
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};
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// Main pack function
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bool Arch::pack()
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{
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// XXX
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return true;
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Context *ctx = getCtx();
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try {
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log_break();
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LeuctraPacker(ctx).pack();
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log_info("Checksum: 0x%08x\n", ctx->checksum());
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// XXX
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//assignArchInfo();
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return true;
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} catch (log_execution_error_exception) {
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// XXX
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//assignArchInfo();
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return false;
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}
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}
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NEXTPNR_NAMESPACE_END
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