wip stuff

leuctra/arch.cc

@@ -440,6 +440,16 @@ PipId PipIterator::operator*() const {
     return ret;
 }
 
+
+BelPin BelPinIterator::operator*() const {
+    BelPin ret;
+    ret.bel.index = ptr->bel_idx;
+    ret.bel.location = bel_loc;
+    auto &bt = arch->getBelTypeInfo(ret.bel);
+    ret.pin.index = bt.pins[ptr->pin_idx].name_id;
+    return ret;
+}
+
 // -----------------------------------------------------------------------
 //
 // XXX package pins

leuctra/arch.h

@@ -160,6 +160,11 @@ NPNR_PACKED_STRUCT(struct BelTypePOD {
     int32_t num_conflicts;
 });
 
+NPNR_PACKED_STRUCT(struct TileTypeWireBelXrefPOD {
+    int32_t bel_idx;
+    int32_t pin_idx;
+});
+
 NPNR_PACKED_STRUCT(struct TileTypeWirePortXrefPOD {
     int32_t port_idx;
     int32_t wire_idx;
@@ -169,9 +174,9 @@ NPNR_PACKED_STRUCT(struct TileTypeWirePortXrefPOD {
 NPNR_PACKED_STRUCT(struct TileTypeWirePOD {
     int32_t name_id;
     int32_t type_name_id;
-    // The BEL and pin this wire is attached to, if any.
+    // A list of bel pins referencing this wire.
-    int32_t bel_idx;
+    int32_t num_bel_xrefs;
-    int32_t bel_pin_idx;
+    RelPtr<TileTypeWireBelXrefPOD> bel_xrefs;
     // A list of pips referencing this wire as dst.
     int32_t num_pip_dst_xrefs;
     RelPtr<int32_t> pip_dst_xrefs;
@@ -270,7 +275,7 @@ NPNR_PACKED_STRUCT(struct FamilyPOD {
     RelPtr<TileTypePOD> tile_types;
 });
 
-#define DB_FORMAT_TAG_CURRENT 0x2
+#define DB_FORMAT_TAG_CURRENT 0x3
 
 /************************ End of chipdb section. ************************/
 
@@ -327,21 +332,17 @@ struct BelRange
 
 // -----------------------------------------------------------------------
 
+struct Arch;
+
 struct BelPinIterator
 {
-    BelId bel;
+    const Arch *arch;
-    IdString pin;
+    const TileTypeWireBelXrefPOD *ptr = nullptr;
+    Location bel_loc;
+    void operator++() { ptr++; }
+    bool operator!=(const BelPinIterator &other) const { return ptr != other.ptr; }
 
-    void operator++() { bel = BelId(); }
+    BelPin operator*() const;
-    bool operator!=(const BelPinIterator &other) const { return bel != other.bel; }
-
-    BelPin operator*() const
-    {
-        BelPin ret;
-	ret.bel = bel;
-	ret.pin = pin;
-        return ret;
-    }
 };
 
 struct BelPinRange
@@ -505,8 +506,6 @@ struct AllPipRange
 
 // -----------------------------------------------------------------------
 
-struct Arch;
-
 struct PipIterator
 {
     enum {
@@ -781,12 +780,10 @@ struct Arch : BaseCtx
     {
 	BelPinRange res;
 	auto &ttw = getTileTypeWire(wire);
-	if (ttw.bel_idx != -1) {
+	res.b.ptr = ttw.bel_xrefs.get();
-	    res.b.bel.location = wire.location;
+	res.e.ptr = ttw.bel_xrefs.get() + ttw.num_bel_xrefs;
-	    res.b.bel.index = ttw.bel_idx;
+	res.b.bel_loc = res.e.bel_loc = wire.location;
-	    auto &bt = getBelTypeInfo(res.b.bel);
+	res.b.arch = res.e.arch = this;
-	    res.b.pin.index = bt.pins[ttw.bel_pin_idx].name_id;
-	}
 	return res;
     }
 

leuctra/cells.h

@@ -0,0 +1,41 @@
+/*
+ *  nextpnr -- Next Generation Place and Route
+ *
+ *  Copyright (C) 2018  David Shah <david@symbioticeda.com>
+ *
+ *  Permission to use, copy, modify, and/or distribute this software for any
+ *  purpose with or without fee is hereby granted, provided that the above
+ *  copyright notice and this permission notice appear in all copies.
+ *
+ *  THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ *  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ *  ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ *  WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ *  ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ *  OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+
+#ifndef LEUCTRA_CELLS_H
+#define LEUCTRA_CELLS_H
+
+#include "nextpnr.h"
+
+NEXTPNR_NAMESPACE_BEGIN
+
+inline bool is_xilinx_iobuf(const BaseCtx *ctx, const CellInfo *cell) {
+   return cell->type == ctx->id("IBUF")
+	   || cell->type == ctx->id("IBUFDS")
+	   || cell->type == ctx->id("IBUFDS_DIFF_OUT")
+	   || cell->type == ctx->id("OBUF")
+	   || cell->type == ctx->id("OBUFDS")
+	   || cell->type == ctx->id("OBUFT")
+	   || cell->type == ctx->id("OBUFTDS")
+	   || cell->type == ctx->id("IOBUF")
+	   || cell->type == ctx->id("IOBUFDS");
+}
+
+NEXTPNR_NAMESPACE_END
+
+#endif

leuctra/pack.cc

@@ -18,14 +18,74 @@
  */
 
 #include "nextpnr.h"
+#include "log.h"
 
 NEXTPNR_NAMESPACE_BEGIN
 
+static bool is_nextpnr_iob(Context *ctx, CellInfo *cell)
+{
+    return cell->type == ctx->id("$nextpnr_ibuf") || cell->type == ctx->id("$nextpnr_obuf") ||
+           cell->type == ctx->id("$nextpnr_iobuf");
+}
+
+class LeuctraPacker
+{
+  public:
+    LeuctraPacker(Context *ctx) : ctx(ctx){};
+
+  private:
+    // Process the contents of packed_cells and new_cells
+    void flush_cells()
+    {
+        for (auto pcell : packed_cells) {
+            ctx->cells.erase(pcell);
+        }
+        for (auto &ncell : new_cells) {
+            ctx->cells[ncell->name] = std::move(ncell);
+        }
+        packed_cells.clear();
+        new_cells.clear();
+    }
+
+    // Remove nextpnr iob cells, insert Xilinx primitives instead.
+    void pack_iob()
+    {
+        log_info("Packing IOBs..\n");
+
+	// XXX
+
+        flush_cells();
+    }
+
+  public:
+    void pack()
+    {
+        pack_iob();
+    }
+
+  private:
+    Context *ctx;
+
+    std::unordered_set<IdString> packed_cells;
+    std::vector<std::unique_ptr<CellInfo>> new_cells;
+};
+
 // Main pack function
 bool Arch::pack()
 {
+    Context *ctx = getCtx();
+    try {
+        log_break();
+        LeuctraPacker(ctx).pack();
+        log_info("Checksum: 0x%08x\n", ctx->checksum());
         // XXX
+        //assignArchInfo();
         return true;
+    } catch (log_execution_error_exception) {
+        // XXX
+        //assignArchInfo();
+        return false;
+    }
 }
 
 NEXTPNR_NAMESPACE_END