Code formatting
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
This commit is contained in:
Maciej Kurc
parent
76f5874ffc
commit
1db3a87c62
@ -179,8 +179,7 @@ po::options_description CommandHandler::getGeneralOptions()
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general.add_options()("report", po::value<std::string>(),
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"write timing and utilization report in JSON format to file");
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general.add_options()("detailed-timing-report",
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"Append detailed net timing data to the JSON report");
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general.add_options()("detailed-timing-report", "Append detailed net timing data to the JSON report");
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general.add_options()("placed-svg", po::value<std::string>(), "write render of placement to SVG file");
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general.add_options()("routed-svg", po::value<std::string>(), "write render of routing to SVG file");
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@ -242,15 +242,17 @@ struct ClockPair
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struct CriticalPath
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{
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struct Segment {
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struct Segment
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{
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// Segment type
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enum class Type {
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CLK_TO_Q, // Clock-to-Q delay
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SOURCE, // Delayless source
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LOGIC, // Combinational logic delay
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ROUTING, // Routing delay
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SETUP // Setup time in sink
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enum class Type
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{
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CLK_TO_Q, // Clock-to-Q delay
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SOURCE, // Delayless source
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LOGIC, // Combinational logic delay
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ROUTING, // Routing delay
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SETUP // Setup time in sink
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};
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// Type
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105
common/report.cc
105
common/report.cc
@ -41,60 +41,53 @@ dict<IdString, std::pair<int, int>> get_utilization(const Context *ctx)
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}
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} // namespace
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static std::string clock_event_name (const Context* ctx, const ClockEvent& e) {
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static std::string clock_event_name(const Context *ctx, const ClockEvent &e)
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{
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std::string value;
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if (e.clock == ctx->id("$async$"))
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value = std::string("<async>");
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else
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value = (e.edge == FALLING_EDGE ? std::string("negedge ") :
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std::string("posedge ")) + e.clock.str(ctx);
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value = (e.edge == FALLING_EDGE ? std::string("negedge ") : std::string("posedge ")) + e.clock.str(ctx);
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return value;
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};
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static Json::array report_critical_paths (const Context* ctx) {
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static Json::array report_critical_paths(const Context *ctx)
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{
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auto report_critical_path = [ctx](const CriticalPath& report) {
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auto report_critical_path = [ctx](const CriticalPath &report) {
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Json::array pathJson;
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for (const auto& segment : report.segments) {
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for (const auto &segment : report.segments) {
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const auto& driver = ctx->cells.at(segment.from.first);
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const auto& sink = ctx->cells.at(segment.to.first);
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const auto &driver = ctx->cells.at(segment.from.first);
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const auto &sink = ctx->cells.at(segment.to.first);
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auto fromLoc = ctx->getBelLocation(driver->bel);
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auto toLoc = ctx->getBelLocation(sink->bel);
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auto fromJson = Json::object({
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{"cell", segment.from.first.c_str(ctx)},
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{"port", segment.from.second.c_str(ctx)},
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{"loc", Json::array({fromLoc.x, fromLoc.y})}
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});
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auto fromJson = Json::object({{"cell", segment.from.first.c_str(ctx)},
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{"port", segment.from.second.c_str(ctx)},
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{"loc", Json::array({fromLoc.x, fromLoc.y})}});
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auto toJson = Json::object({
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{"cell", segment.to.first.c_str(ctx)},
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{"port", segment.to.second.c_str(ctx)},
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{"loc", Json::array({toLoc.x, toLoc.y})}
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});
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auto toJson = Json::object({{"cell", segment.to.first.c_str(ctx)},
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{"port", segment.to.second.c_str(ctx)},
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{"loc", Json::array({toLoc.x, toLoc.y})}});
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auto segmentJson = Json::object({
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{"delay", ctx->getDelayNS(segment.delay)},
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{"from", fromJson},
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{"to", toJson},
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{"delay", ctx->getDelayNS(segment.delay)},
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{"from", fromJson},
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{"to", toJson},
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});
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if (segment.type == CriticalPath::Segment::Type::CLK_TO_Q) {
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segmentJson["type"] = "clk-to-q";
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}
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else if (segment.type == CriticalPath::Segment::Type::SOURCE) {
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} else if (segment.type == CriticalPath::Segment::Type::SOURCE) {
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segmentJson["type"] = "source";
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}
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else if (segment.type == CriticalPath::Segment::Type::LOGIC) {
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} else if (segment.type == CriticalPath::Segment::Type::LOGIC) {
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segmentJson["type"] = "logic";
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}
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else if (segment.type == CriticalPath::Segment::Type::SETUP) {
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} else if (segment.type == CriticalPath::Segment::Type::SETUP) {
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segmentJson["type"] = "setup";
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}
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else if (segment.type == CriticalPath::Segment::Type::ROUTING) {
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} else if (segment.type == CriticalPath::Segment::Type::ROUTING) {
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segmentJson["type"] = "routing";
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segmentJson["net"] = segment.net.c_str(ctx);
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segmentJson["budget"] = ctx->getDelayNS(segment.budget);
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@ -111,58 +104,51 @@ static Json::array report_critical_paths (const Context* ctx) {
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// Critical paths
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for (auto &report : ctx->timing_result.clock_paths) {
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critPathsJson.push_back(Json::object({
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{"from", clock_event_name(ctx, report.second.clock_pair.start)},
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{"to", clock_event_name(ctx, report.second.clock_pair.end)},
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{"path", report_critical_path(report.second)}
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}));
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critPathsJson.push_back(Json::object({{"from", clock_event_name(ctx, report.second.clock_pair.start)},
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{"to", clock_event_name(ctx, report.second.clock_pair.end)},
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{"path", report_critical_path(report.second)}}));
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}
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// Cross-domain paths
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for (auto &report : ctx->timing_result.xclock_paths) {
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critPathsJson.push_back(Json::object({
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{"from", clock_event_name(ctx, report.clock_pair.start)},
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{"to", clock_event_name(ctx, report.clock_pair.end)},
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{"path", report_critical_path(report)}
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}));
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critPathsJson.push_back(Json::object({{"from", clock_event_name(ctx, report.clock_pair.start)},
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{"to", clock_event_name(ctx, report.clock_pair.end)},
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{"path", report_critical_path(report)}}));
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}
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return critPathsJson;
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}
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static Json::array report_detailed_net_timings (const Context* ctx) {
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static Json::array report_detailed_net_timings(const Context *ctx)
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{
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auto detailedNetTimingsJson = Json::array();
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// Detailed per-net timing analysis
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for (const auto& it : ctx->timing_result.detailed_net_timings) {
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for (const auto &it : ctx->timing_result.detailed_net_timings) {
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const NetInfo* net = ctx->nets.at(it.first).get();
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const NetInfo *net = ctx->nets.at(it.first).get();
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ClockEvent start = it.second[0].clock_pair.start;
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Json::array endpointsJson;
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for (const auto& sink_timing : it.second) {
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for (const auto &sink_timing : it.second) {
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// FIXME: Is it possible that there are multiple different start
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// events for a single net? It has a single driver
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NPNR_ASSERT(sink_timing.clock_pair.start == start);
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auto endpointJson = Json::object({
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{"cell", sink_timing.cell_port.first.c_str(ctx)},
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{"port", sink_timing.cell_port.second.c_str(ctx)},
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{"event", clock_event_name(ctx, sink_timing.clock_pair.end)},
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{"delay", ctx->getDelayNS(sink_timing.delay)},
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{"budget", ctx->getDelayNS(sink_timing.budget)}
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});
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auto endpointJson = Json::object({{"cell", sink_timing.cell_port.first.c_str(ctx)},
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{"port", sink_timing.cell_port.second.c_str(ctx)},
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{"event", clock_event_name(ctx, sink_timing.clock_pair.end)},
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{"delay", ctx->getDelayNS(sink_timing.delay)},
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{"budget", ctx->getDelayNS(sink_timing.budget)}});
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endpointsJson.push_back(endpointJson);
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}
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auto netTimingJson = Json::object({
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{"net", net->name.c_str(ctx)},
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{"driver", net->driver.cell->name.c_str(ctx)},
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{"port", net->driver.port.c_str(ctx)},
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{"event", clock_event_name(ctx, start)},
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{"endpoints", endpointsJson}
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});
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auto netTimingJson = Json::object({{"net", net->name.c_str(ctx)},
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{"driver", net->driver.cell->name.c_str(ctx)},
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{"port", net->driver.port.c_str(ctx)},
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{"event", clock_event_name(ctx, start)},
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{"endpoints", endpointsJson}});
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detailedNetTimingsJson.push_back(netTimingJson);
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}
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@ -261,10 +247,7 @@ void Context::writeReport(std::ostream &out) const
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}
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Json::object jsonRoot{
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{"utilization", util_json},
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{"fmax", fmax_json},
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{"critical_paths", report_critical_paths(this)}
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};
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{"utilization", util_json}, {"fmax", fmax_json}, {"critical_paths", report_critical_paths(this)}};
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if (detailed_timing_report) {
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jsonRoot["detailed_net_timings"] = report_detailed_net_timings(this);
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@ -644,8 +644,7 @@ struct Timing
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};
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Timing(Context *ctx, bool net_delays, bool update, CriticalPathDataMap *crit_path = nullptr,
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DelayFrequency *slack_histogram = nullptr,
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DetailedNetTimings *detailed_net_timings = nullptr)
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DelayFrequency *slack_histogram = nullptr, DetailedNetTimings *detailed_net_timings = nullptr)
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: ctx(ctx), net_delays(net_delays), update(update), min_slack(1.0e12 / ctx->setting<float>("target_freq")),
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crit_path(crit_path), slack_histogram(slack_histogram), detailed_net_timings(detailed_net_timings),
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async_clock(ctx->id("$async$"))
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@ -1108,7 +1107,8 @@ void assign_budget(Context *ctx, bool quiet)
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log_info("Checksum: 0x%08x\n", ctx->checksum());
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}
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CriticalPath build_critical_path_report(Context* ctx, ClockPair &clocks, const PortRefVector &crit_path) {
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CriticalPath build_critical_path_report(Context *ctx, ClockPair &clocks, const PortRefVector &crit_path)
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{
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CriticalPath report;
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report.clock_pair = clocks;
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@ -1120,7 +1120,7 @@ CriticalPath build_critical_path_report(Context* ctx, ClockPair &clocks, const P
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int port_clocks;
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auto portClass = ctx->getPortTimingClass(front_driver.cell, front_driver.port, port_clocks);
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const CellInfo* last_cell = front->cell;
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const CellInfo *last_cell = front->cell;
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IdString last_port = front_driver.port;
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int clock_start = -1;
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@ -1128,8 +1128,7 @@ CriticalPath build_critical_path_report(Context* ctx, ClockPair &clocks, const P
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for (int i = 0; i < port_clocks; i++) {
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TimingClockingInfo clockInfo = ctx->getPortClockingInfo(front_driver.cell, front_driver.port, i);
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const NetInfo *clknet = get_net_or_empty(front_driver.cell, clockInfo.clock_port);
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if (clknet != nullptr && clknet->name == clocks.start.clock &&
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clockInfo.edge == clocks.start.edge) {
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if (clknet != nullptr && clknet->name == clocks.start.clock && clockInfo.edge == clocks.start.edge) {
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last_port = clockInfo.clock_port;
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clock_start = i;
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break;
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@ -1202,7 +1201,8 @@ CriticalPath build_critical_path_report(Context* ctx, ClockPair &clocks, const P
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return report;
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}
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void timing_analysis(Context *ctx, bool print_histogram, bool print_fmax, bool print_path, bool warn_on_failure, bool update_results)
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void timing_analysis(Context *ctx, bool print_histogram, bool print_fmax, bool print_path, bool warn_on_failure,
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bool update_results)
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{
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auto format_event = [ctx](const ClockEvent &e, int field_width = 0) {
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std::string value;
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@ -1251,7 +1251,7 @@ void timing_analysis(Context *ctx, bool print_histogram, bool print_fmax, bool p
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else
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Fmax = 500 / ctx->getDelayNS(path.second.path_delay);
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if (!clock_fmax.count(a.clock) || Fmax < clock_fmax.at(a.clock).achieved) {
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clock_fmax[a.clock].achieved = Fmax;
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clock_fmax[a.clock].achieved = Fmax;
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clock_fmax[a.clock].constraint = 0.0f; // Will be filled later
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clock_reports[a.clock] = build_critical_path_report(ctx, path.first, path.second.ports);
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clock_reports[a.clock].period = path.second.path_period;
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@ -1274,9 +1274,8 @@ void timing_analysis(Context *ctx, bool print_histogram, bool print_fmax, bool p
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}
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std::sort(xclock_reports.begin(), xclock_reports.end(), [ctx](const CriticalPath &ra, const CriticalPath &rb) {
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const auto& a = ra.clock_pair;
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const auto& b = rb.clock_pair;
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const auto &a = ra.clock_pair;
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const auto &b = rb.clock_pair;
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if (a.start.clock.str(ctx) < b.start.clock.str(ctx))
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return true;
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@ -1334,55 +1333,40 @@ void timing_analysis(Context *ctx, bool print_histogram, bool print_fmax, bool p
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};
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// A helper function for reporting one critical path
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auto print_path_report = [ctx](const CriticalPath& path) {
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auto print_path_report = [ctx](const CriticalPath &path) {
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delay_t total = 0, logic_total = 0, route_total = 0;
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log_info("curr total\n");
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for (const auto& segment : path.segments) {
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for (const auto &segment : path.segments) {
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total += segment.delay;
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if (segment.type == CriticalPath::Segment::Type::CLK_TO_Q ||
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segment.type == CriticalPath::Segment::Type::SOURCE ||
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segment.type == CriticalPath::Segment::Type::LOGIC ||
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segment.type == CriticalPath::Segment::Type::SETUP)
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{
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segment.type == CriticalPath::Segment::Type::SETUP) {
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logic_total += segment.delay;
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const std::string type_name =
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(segment.type == CriticalPath::Segment::Type::SETUP) ?
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"Setup" : "Source";
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(segment.type == CriticalPath::Segment::Type::SETUP) ? "Setup" : "Source";
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log_info("%4.1f %4.1f %s %s.%s\n",
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ctx->getDelayNS(segment.delay),
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ctx->getDelayNS(total),
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type_name.c_str(),
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segment.to.first.c_str(ctx),
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segment.to.second.c_str(ctx)
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);
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}
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else if (segment.type == CriticalPath::Segment::Type::ROUTING) {
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log_info("%4.1f %4.1f %s %s.%s\n", ctx->getDelayNS(segment.delay), ctx->getDelayNS(total),
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type_name.c_str(), segment.to.first.c_str(ctx), segment.to.second.c_str(ctx));
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} else if (segment.type == CriticalPath::Segment::Type::ROUTING) {
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route_total += segment.delay;
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const auto& driver = ctx->cells.at(segment.from.first);
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const auto& sink = ctx->cells.at(segment.to.first);
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const auto &driver = ctx->cells.at(segment.from.first);
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const auto &sink = ctx->cells.at(segment.to.first);
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auto driver_loc = ctx->getBelLocation(driver->bel);
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auto sink_loc = ctx->getBelLocation(sink->bel);
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log_info("%4.1f %4.1f Net %s budget %f ns (%d,%d) -> (%d,%d)\n",
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ctx->getDelayNS(segment.delay),
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ctx->getDelayNS(total),
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segment.net.c_str(ctx),
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ctx->getDelayNS(segment.budget),
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driver_loc.x, driver_loc.y, sink_loc.x, sink_loc.y
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);
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log_info(" Sink %s.%s\n",
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segment.to.first.c_str(ctx),
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segment.to.second.c_str(ctx)
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);
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log_info("%4.1f %4.1f Net %s budget %f ns (%d,%d) -> (%d,%d)\n", ctx->getDelayNS(segment.delay),
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ctx->getDelayNS(total), segment.net.c_str(ctx), ctx->getDelayNS(segment.budget),
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driver_loc.x, driver_loc.y, sink_loc.x, sink_loc.y);
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log_info(" Sink %s.%s\n", segment.to.first.c_str(ctx), segment.to.second.c_str(ctx));
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const NetInfo* net = ctx->nets.at(segment.net).get();
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const NetInfo *net = ctx->nets.at(segment.net).get();
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if (ctx->verbose) {
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@ -1424,8 +1408,8 @@ void timing_analysis(Context *ctx, bool print_histogram, bool print_fmax, bool p
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// Single domain paths
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for (auto &clock : clock_reports) {
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log_break();
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std::string start =
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clock.second.clock_pair.start.edge == FALLING_EDGE ? std::string("negedge") : std::string("posedge");
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std::string start = clock.second.clock_pair.start.edge == FALLING_EDGE ? std::string("negedge")
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: std::string("posedge");
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std::string end =
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clock.second.clock_pair.end.edge == FALLING_EDGE ? std::string("negedge") : std::string("posedge");
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log_info("Critical path report for clock '%s' (%s -> %s):\n", clock.first.c_str(ctx), start.c_str(),
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@ -1455,9 +1439,9 @@ void timing_analysis(Context *ctx, bool print_histogram, bool print_fmax, bool p
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const auto &clock_name = clock.first.str(ctx);
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const int width = max_width - clock_name.size();
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float fmax = clock_fmax[clock.first].achieved;
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float fmax = clock_fmax[clock.first].achieved;
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float target = clock_fmax[clock.first].constraint;
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bool passed = target < fmax;
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bool passed = target < fmax;
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if (!warn_on_failure || passed)
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log_info("Max frequency for clock %*s'%s': %.02f MHz (%s at %.02f MHz)\n", width, "",
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@ -1485,7 +1469,7 @@ void timing_analysis(Context *ctx, bool print_histogram, bool print_fmax, bool p
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const ClockEvent &a = report.clock_pair.start;
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const ClockEvent &b = report.clock_pair.end;
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delay_t path_delay = 0;
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for (const auto& segment : report.segments) {
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for (const auto &segment : report.segments) {
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path_delay += segment.delay;
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||||
}
|
||||
auto ev_a = format_event(a, start_field_width), ev_b = format_event(b, end_field_width);
|
||||
@ -1526,10 +1510,10 @@ void timing_analysis(Context *ctx, bool print_histogram, bool print_fmax, bool p
|
||||
|
||||
// Update timing results in the context
|
||||
if (update_results) {
|
||||
auto& results = ctx->timing_result;
|
||||
auto &results = ctx->timing_result;
|
||||
|
||||
results.clock_fmax = std::move(clock_fmax);
|
||||
results.clock_paths = std::move(clock_reports);
|
||||
results.clock_fmax = std::move(clock_fmax);
|
||||
results.clock_paths = std::move(clock_reports);
|
||||
results.xclock_paths = std::move(xclock_reports);
|
||||
|
||||
results.detailed_net_timings = std::move(detailed_net_timings);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user