Fix compiler warnings introduced by -Wextra
Signed-off-by: gatecat <gatecat@ds0.me>
This commit is contained in:
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17183fff05
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23413a4d12
@ -95,6 +95,7 @@ template <typename T1, typename T2>
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class ValueArray2 {
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public:
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ValueArray2(T1 v1, T2 v2) : v1_(v1), v2_(v2) {}
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ValueArray2(const ValueArray2& other) = default;
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template <typename T>
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operator ParamGenerator<T>() const {
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@ -106,7 +106,8 @@ if (MSVC)
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set(CMAKE_CXX_FLAGS_DEBUG "${CMAKE_CXX_FLAGS_DEBUG} /D_DEBUG /W4 /wd4100 /wd4244 /wd4125 /wd4800 /wd4456 /wd4458 /wd4305 /wd4459 /wd4121 /wd4996")
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set(CMAKE_CXX_FLAGS_RELEASE "${CMAKE_CXX_FLAGS_RELEASE} /W4 /wd4100 /wd4244 /wd4125 /wd4800 /wd4456 /wd4458 /wd4305 /wd4459 /wd4121 /wd4996 /wd4127")
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else()
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set(WARN_FLAGS "-Wall -Wextra -Wno-unused-parameter -Wno-missing-field-initializers -Werror=sign-compare -Werror=return-type")
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# N.B. the -Wno-array-bounds is to work around a false positive in GCC 9
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set(WARN_FLAGS "-Wall -Wextra -Wno-unused-parameter -Wno-missing-field-initializers -Wno-array-bounds -Werror=sign-compare -Werror=return-type")
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if (WERROR)
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set(WARN_FLAGS "${WARN_FLAGS} -Werror")
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endif()
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@ -99,7 +99,7 @@ inline void assert_fail_impl_str(std::string message, const char *expr_str, cons
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#define NPNR_ASSERT_FALSE(msg) (assert_fail_impl(msg, "false", __FILE__, __LINE__))
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#define NPNR_ASSERT_FALSE_STR(msg) (assert_fail_impl_str(msg, "false", __FILE__, __LINE__))
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#define STRINGIFY(x) #x
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#define NPNR_STRINGIFY(x) #x
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struct BaseCtx;
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struct Context;
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@ -541,7 +541,7 @@ struct Property
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ret.is_string = false;
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ret.str.reserve(len);
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for (int i = offset; i < offset + len; i++)
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ret.str.push_back(i < int(str.size()) ? str[i] : padding);
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ret.str.push_back(i < int(str.size()) ? str[i] : char(padding));
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ret.update_intval();
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return ret;
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}
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@ -1255,7 +1255,7 @@ template <typename R> struct BaseArch : ArchAPI<R>
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// Default, trivial, implementations of Arch API functions for arches that don't need complex behaviours
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// Basic config
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virtual IdString archId() const override { return this->id(STRINGIFY(ARCHNAME)); }
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virtual IdString archId() const override { return this->id(NPNR_STRINGIFY(ARCHNAME)); }
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virtual IdString archArgsToId(typename R::ArchArgsT args) const override { return IdString(); }
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virtual int getTilePipDimZ(int x, int y) const override { return 1; }
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virtual char getNameDelimiter() const override { return ' '; }
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@ -31,8 +31,8 @@ NPNR_PACKED_STRUCT(template <typename T> struct RelSlice {
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const T *begin() const { return get(); }
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const T *end() const { return get() + length; }
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const size_t size() const { return length; }
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const ptrdiff_t ssize() const { return length; }
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size_t size() const { return length; }
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ptrdiff_t ssize() const { return length; }
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const T &operator*() const { return *(get()); }
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@ -1211,7 +1211,7 @@ Router2Cfg::Router2Cfg(Context *ctx)
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hist_cong_weight = ctx->setting<float>("router2/histCongWeight", 1.0f);
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curr_cong_mult = ctx->setting<float>("router2/currCongWeightMult", 2.0f);
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estimate_weight = ctx->setting<float>("router2/estimateWeight", 1.75f);
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perf_profile = ctx->setting<float>("router2/perfProfile", false);
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perf_profile = ctx->setting<bool>("router2/perfProfile", false);
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}
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NEXTPNR_NAMESPACE_END
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@ -56,7 +56,6 @@ struct Location
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Location() : x(-1), y(-1){};
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Location(int16_t x, int16_t y) : x(x), y(y){};
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Location(const LocationPOD &pod) : x(pod.x), y(pod.y){};
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Location(const Location &loc) : x(loc.x), y(loc.y){};
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bool operator==(const Location &other) const { return x == other.x && y == other.y; }
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bool operator!=(const Location &other) const { return x != other.x || y != other.y; }
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@ -77,7 +77,7 @@ bool Arch::apply_lpf(std::string filename, std::istream &in)
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std::string tmp;
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while (ss >> tmp)
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words.push_back(tmp);
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if (words.size() >= 0) {
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if (words.size() > 0) {
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std::string verb = words.at(0);
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if (verb == "BLOCK") {
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if (words.size() != 2 || (words.at(1) != "ASYNCPATHS" && words.at(1) != "RESETPATHS"))
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@ -441,7 +441,7 @@ void DedicatedInterconnect::find_dedicated_interconnect()
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continue;
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}
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for (size_t i = 0; i < bel_data.num_bel_wires; ++i) {
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for (int i = 0; i < bel_data.num_bel_wires; ++i) {
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if (bel_data.types[i] != PORT_IN) {
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continue;
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}
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@ -470,7 +470,7 @@ void DedicatedInterconnect::find_dedicated_interconnect()
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continue;
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}
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for (size_t i = 0; i < bel_data.num_bel_wires; ++i) {
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for (int i = 0; i < bel_data.num_bel_wires; ++i) {
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if (bel_data.types[i] != PORT_OUT) {
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continue;
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}
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@ -1018,7 +1018,7 @@ size_t ModuleReader::translate_port_index(LogicalNetlist::Netlist::PortInstance:
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NPNR_ASSERT(port.isBus());
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uint32_t idx = port_inst.getBusIdx().getIdx();
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size_t width = get_port_width(port);
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NPNR_ASSERT(idx >= 0 && idx < width);
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NPNR_ASSERT(idx < width);
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return width - 1 - idx;
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}
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}
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@ -613,20 +613,20 @@ Arch::Arch(ArchArgs args) : args(args)
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// fall through the ++
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case ID_LUT7:
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z++;
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dff = false;
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dff = false; /* fall-through*/
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case ID_LUT6:
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z++;
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dff = false;
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dff = false; /* fall-through*/
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case ID_LUT5:
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z++;
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z++; /* fall-through*/
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case ID_LUT4:
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z++;
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z++; /* fall-through*/
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case ID_LUT3:
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z++;
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z++; /* fall-through*/
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case ID_LUT2:
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z++;
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z++; /* fall-through*/
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case ID_LUT1:
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z++;
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z++; /* fall-through*/
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case ID_LUT0:
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// common LUT+DFF code
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snprintf(buf, 32, "R%dC%d_SLICE%d", row + 1, col + 1, z);
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@ -654,23 +654,23 @@ Arch::Arch(ArchArgs args) : args(args)
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}
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break;
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case ID_IOBJ:
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z++;
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z++; /* fall-through*/
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case ID_IOBI:
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z++;
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z++; /* fall-through*/
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case ID_IOBH:
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z++;
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z++; /* fall-through*/
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case ID_IOBG:
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z++;
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z++; /* fall-through*/
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case ID_IOBF:
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z++;
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z++; /* fall-through*/
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case ID_IOBE:
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z++;
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z++; /* fall-through*/
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case ID_IOBD:
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z++;
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z++; /* fall-through*/
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case ID_IOBC:
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z++;
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z++; /* fall-through*/
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case ID_IOBB:
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z++;
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z++; /* fall-through*/
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case ID_IOBA:
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snprintf(buf, 32, "R%dC%d_IOB%c", row + 1, col + 1, 'A' + z);
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belname = id(buf);
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16
gowin/arch.h
16
gowin/arch.h
@ -348,9 +348,9 @@ struct Arch : BaseArch<ArchRanges>
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int getGridDimX() const override { return gridDimX; }
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int getGridDimY() const override { return gridDimY; }
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int getTileBelDimZ(int x, int y) const { return tileBelDimZ[x][y]; }
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int getTilePipDimZ(int x, int y) const { return tilePipDimZ[x][y]; }
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char getNameDelimiter() const
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int getTileBelDimZ(int x, int y) const override { return tileBelDimZ[x][y]; }
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int getTilePipDimZ(int x, int y) const override { return tilePipDimZ[x][y]; }
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char getNameDelimiter() const override
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{
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return ' '; /* use a non-existent delimiter as we aren't using IdStringLists yet */
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}
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@ -431,13 +431,13 @@ struct Arch : BaseArch<ArchRanges>
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bool place() override;
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bool route() override;
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bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayQuad &delay) const;
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bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayQuad &delay) const override;
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// Get the port class, also setting clockInfoCount to the number of TimingClockingInfos associated with a port
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TimingPortClass getPortTimingClass(const CellInfo *cell, IdString port, int &clockInfoCount) const;
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TimingPortClass getPortTimingClass(const CellInfo *cell, IdString port, int &clockInfoCount) const override;
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// Get the TimingClockingInfo of a port
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TimingClockingInfo getPortClockingInfo(const CellInfo *cell, IdString port, int index) const;
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TimingClockingInfo getPortClockingInfo(const CellInfo *cell, IdString port, int index) const override;
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bool isBelLocationValid(BelId bel) const;
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bool isBelLocationValid(BelId bel) const override;
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static const std::string defaultPlacer;
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static const std::vector<std::string> availablePlacers;
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@ -446,7 +446,7 @@ struct Arch : BaseArch<ArchRanges>
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// ---------------------------------------------------------------
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// Internal usage
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void assignArchInfo();
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void assignArchInfo() override;
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bool cellsCompatible(const CellInfo **cells, int count) const;
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std::vector<IdString> cell_types;
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@ -61,10 +61,10 @@ std::unique_ptr<Context> GowinCommandHandler::createContext(std::unordered_map<s
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log_error("Invalid device %s\n", device.c_str());
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}
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ArchArgs chipArgs;
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char buf[32];
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snprintf(buf, 32, "GW1N%s-%s", match[1].str().c_str(), match[3].str().c_str());
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char buf[36];
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snprintf(buf, 36, "GW1N%s-%s", match[1].str().c_str(), match[3].str().c_str());
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chipArgs.device = buf;
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snprintf(buf, 32, "GW1N-%s", match[3].str().c_str());
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snprintf(buf, 36, "GW1N-%s", match[3].str().c_str());
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chipArgs.family = buf;
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chipArgs.package = match[4];
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chipArgs.speed = match[5];
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@ -202,6 +202,8 @@ class FPGAViewWidget : public QOpenGLWidget, protected QOpenGLFunctions
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}
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}
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PickedElement &operator=(const PickedElement &other) = default;
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DecalXY decal(Context *ctx) const
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{
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DecalXY decal;
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@ -52,8 +52,6 @@ template <typename CoordinateT, typename ElementT> class QuadTreeNode
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BoundingBox() : x0_(pinf), y0_(pinf), x1_(ninf), y1_(ninf) {}
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BoundingBox(const BoundingBox &other) : x0_(other.x0_), y0_(other.y0_), x1_(other.x1_), y1_(other.y1_) {}
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// Whether a bounding box contains a given points.
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// A point is defined to be in a bounding box when it's not lesser than
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// the lower coordinate or greater than the higher coordinate, eg:
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@ -218,7 +218,7 @@ template <typename ElementT> class ElementList : public Item
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name.remove(0, prefix.size());
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auto item = new IdStringItem(ctx_, idstring, this, child_type_);
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managed_[idstring] = std::move(std::unique_ptr<Item>(item));
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managed_[idstring] = std::unique_ptr<Item>(item);
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}
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}
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@ -306,7 +306,7 @@ template <typename ElementT> class ElementXYRoot : public Item
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// Create X list Item.
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auto item = new Item(QString("X%1").arg(i), this);
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managed_labels_.push_back(std::move(std::unique_ptr<Item>(item)));
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managed_labels_.push_back(std::unique_ptr<Item>(item));
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for (auto j : y_present) {
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// Create Y list ElementList.
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@ -314,7 +314,7 @@ template <typename ElementT> class ElementXYRoot : public Item
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new ElementList<ElementT>(ctx_, QString("Y%1").arg(j), item, &map_, i, j, getter_, child_type_);
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// Pre-populate list with one element, other Qt will never ask for more.
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item2->fetchMore(1);
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managed_lists_.push_back(std::move(std::unique_ptr<ElementList<ElementT>>(item2)));
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managed_lists_.push_back(std::unique_ptr<ElementList<ElementT>>(item2));
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}
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}
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}
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@ -153,6 +153,7 @@ std::string Arch::get_full_chip_name() const
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break;
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case ArchArgs::SPEED_3:
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name += "3";
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break;
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case ArchArgs::SPEED_4:
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name += "4";
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break;
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@ -48,7 +48,6 @@ struct Location
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Location() : x(-1), y(-1){};
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Location(int16_t x, int16_t y) : x(x), y(y){};
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Location(const LocationPOD &pod) : x(pod.x), y(pod.y){};
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Location(const Location &loc) : x(loc.x), y(loc.y){};
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bool operator==(const Location &other) const { return x == other.x && y == other.y; }
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bool operator!=(const Location &other) const { return x != other.x || y != other.y; }
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@ -114,20 +114,6 @@ static std::vector<bool> int_to_bitvector(int val, int size)
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return bv;
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}
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static std::vector<bool> str_to_bitvector(std::string str, int size)
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{
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std::vector<bool> bv;
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bv.resize(size, 0);
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if (str.substr(0, 2) != "0b")
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log_error("error parsing value '%s', expected 0b prefix\n", str.c_str());
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for (int i = 0; i < int(str.size()) - 2; i++) {
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char c = str.at((str.size() - i) - 1);
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NPNR_ASSERT(c == '0' || c == '1');
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bv.at(i) = (c == '1');
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}
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return bv;
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}
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std::string intstr_or_default(const std::unordered_map<IdString, Property> &ct, const IdString &key,
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std::string def = "0")
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{
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2
tests
2
tests
@ -1 +1 @@
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Subproject commit 32db04a11077e7a32adc6f3d473e5cbefe83ff0a
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Subproject commit 34c511444eff51291fa732369e434ff687de310f
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