Use icestorm timing information
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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f3127f7dfd
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2652485a01
@ -214,56 +214,71 @@ def wire_type(name):
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assert 0
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return wt
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def pipdelay(src, dst, db):
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def pipdelay(src_idx, dst_idx, db):
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if db is None:
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return 0
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src = wire_names_r[src]
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dst = wire_names_r[dst]
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src = wire_names_r[src_idx]
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dst = wire_names_r[dst_idx]
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src_type = wire_type(src[2])
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dst_type = wire_type(dst[2])
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if dst[2].startswith("sp4_") or dst[2].startswith("span4_"):
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if src[2].startswith("sp12_") or src[2].startswith("span12_"):
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return db["Sp12to4.I.O"]
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if src[2].startswith("span4_"):
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return db["IoSpan4Mux.I.O"]
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if dst[2].startswith("sp4_h_"):
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return db["Span4Mux_h4.I.O"]
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else:
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return db["Span4Mux_v4.I.O"]
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if dst[2].startswith("sp12_") or dst[2].startswith("span12_"):
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if dst[2].startswith("sp12_h_"):
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return db["Span12Mux_h12.I.O"]
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else:
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return db["Span12Mux_v12.I.O"]
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if dst[2] in ("fabout", "clk"):
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return 0 # FIXME?
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if src[2].startswith("glb_netwk_") and dst[2].startswith("glb2local_"):
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return 0 # FIXME?
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if dst[2] == "carry_in_mux":
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return db["ICE_CARRY_IN_MUX.carryinitin.carryinitout"]
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if dst[2] in ("lutff_global/clk", "io_global/inclk", "io_global/outclk", "ram/RCLK", "ram/WCLK"):
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return db["ClkMux.I.O"]
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if dst[2] in ("lutff_global/s_r", "io_global/latch", "ram/RE", "ram/WE"):
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return db["SRMux.I.O"]
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if dst[2] in ("lutff_global/cen", "io_global/cen", "ram/RCLKE", "ram/WCLKE"):
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return db["CEMux.I.O"]
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if dst[2].startswith("local_"):
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return db["LocalMux.I.O"]
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if src_type == "LOCAL" and dst_type == "LOCAL":
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return 250
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if src[2].startswith("local_") and dst[2] in ("io_0/D_OUT_0", "io_0/D_OUT_1", "io_0/OUT_ENB", "io_1/D_OUT_0", "io_1/D_OUT_1", "io_1/OUT_ENB"):
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return db["IoInMux.I.O"]
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if src_type == "GLOBAL" and dst_type == "LOCAL":
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return 400
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if re.match(r"lutff_\d+/in_\d+", dst[2]):
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return db["InMux.I.O"]
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# Local -> Span
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if re.match(r"ram/(MASK|RADDR|WADDR|WDATA)_", dst[2]):
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return db["InMux.I.O"]
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if src_type == "LOCAL" and dst_type in ("SP4_HORZ", "SP4_VERT"):
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return 350
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if src_type == "LOCAL" and dst_type in ("SP12_HORZ", "SP12_VERT"):
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return 500
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# Span -> Local
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if src_type in ("SP4_HORZ", "SP4_VERT", "SP12_HORZ", "SP12_VERT") and dst_type == "LOCAL":
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return 300
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# Span -> Span
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if src_type in ("SP12_HORZ", "SP12_VERT") and dst_type in ("SP12_HORZ", "SP12_VERT"):
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return 450
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if src_type in ("SP4_HORZ", "SP4_VERT") and dst_type in ("SP4_HORZ", "SP4_VERT"):
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return 300
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if src_type in ("SP12_HORZ", "SP12_VERT") and dst_type in ("SP4_HORZ", "SP4_VERT"):
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return 380
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# print(src, dst, src_type, dst_type, file=sys.stderr)
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print(src, dst, src_idx, dst_idx, src_type, dst_type, file=sys.stderr)
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assert 0
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def wiredelay(wire, db):
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def wiredelay(wire_idx, db):
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if db is None:
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return 0
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wire = wire_names_r[wire]
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wire = wire_names_r[wire_idx]
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wtype = wire_type(wire[2])
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# FIXME
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