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timing: Produce plausible Fmax figure

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Signed-off-by: gatecat <gatecat@ds0.me>
This commit is contained in:
gatecat 2021-03-02 11:00:34 +00:00
parent 541376f8cc
commit 296e6d10c2
2 changed files with 12 additions and 1 deletions
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12
common/timing.cc
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@ -34,6 +34,7 @@ void TimingAnalyser::setup()
{
init_ports();
get_cell_delays();
get_route_delays();
topo_sort();
setup_port_domains();
reset_times();
@ -129,6 +130,15 @@ void TimingAnalyser::get_cell_delays()
}
}
void TimingAnalyser::get_route_delays()
{
for (auto net : sorted(ctx->nets)) {
NetInfo *ni = net.second;
for (auto &usr : ni->users)
ports.at(CellPortKey(usr)).route_delay = DelayPair(ctx->getNetinfoRouteDelay(ni, usr));
}
}
void TimingAnalyser::topo_sort()
{
TopoSort<CellPortKey> topo;
@ -396,7 +406,7 @@ void TimingAnalyser::print_fmax()
for (auto &req : pd.required) {
if (pd.arrival.count(req.first)) {
auto &arr = pd.arrival.at(req.first);
double fmax = 1000.0 / (arr.value.maxDelay() - req.second.value.minDelay());
double fmax = 1000.0 / ctx->getDelayNS(arr.value.maxDelay() - req.second.value.minDelay());
if (!domain_fmax.count(req.first) || domain_fmax.at(req.first) > fmax)
domain_fmax[req.first] = fmax;
}

1
common/timing.h
View File

@ -132,6 +132,7 @@ struct TimingAnalyser
private:
void init_ports();
void get_cell_delays();
void get_route_delays();
void topo_sort();
void setup_port_domains();