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ice40: Fix UltraPlus quasi-logic-cell bits

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Signed-off-by: David Shah <davey1576@gmail.com>
This commit is contained in:
David Shah 2018-06-23 11:25:32 +02:00
parent cb92c10b99
commit 2e6916ecab
1 changed files with 29 additions and 25 deletions
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54
ice40/bitstream.cc
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@ -348,30 +348,34 @@ void write_asc(const Context *ctx, std::ostream &out)
// Weird UltraPlus bits // Weird UltraPlus bits
if (tile == TILE_DSP0 || tile == TILE_DSP1 || tile == TILE_DSP2 || if (tile == TILE_DSP0 || tile == TILE_DSP1 || tile == TILE_DSP2 ||
tile == TILE_IPCON) { tile == TILE_DSP3 || tile == TILE_IPCON) {
for (int lc_idx = 0; lc_idx < 8; lc_idx++) { if (ctx->args.type == ArchArgs::UP5K && x == 25 && y == 14) {
static const std::vector<int> ip_dsp_lut_perm = { // Mystery bits not set in this one tile
4, 14, 15, 5, 6, 16, 17, 7, } else {
3, 13, 12, 2, 1, 11, 10, 0, for (int lc_idx = 0; lc_idx < 8; lc_idx++) {
}; static const std::vector<int> ip_dsp_lut_perm = {
for (int i = 0; i < 16; i++) 4, 14, 15, 5, 6, 16, 17, 7,
set_config(ti, config.at(y).at(x), 3, 13, 12, 2, 1, 11, 10, 0,
"LC_" + std::to_string(lc_idx), };
((i % 8) >= 4), ip_dsp_lut_perm.at(i)); for (int i = 0; i < 16; i++)
if (tile == TILE_IPCON) set_config(ti, config.at(y).at(x),
set_config(ti, config.at(y).at(x), "LC_" + std::to_string(lc_idx),
"Cascade.IPCON_LC0" + ((i % 8) >= 4), ip_dsp_lut_perm.at(i));
std::to_string(lc_idx) + if (tile == TILE_IPCON)
"_inmux02_5", set_config(ti, config.at(y).at(x),
true); "Cascade.IPCON_LC0" +
else std::to_string(lc_idx) +
set_config( "_inmux02_5",
ti, config.at(y).at(x), true);
"Cascade.MULT" + else
std::to_string(int(tile - TILE_DSP0)) + set_config(ti, config.at(y).at(x),
"_LC0" + std::to_string(lc_idx) + "Cascade.MULT" +
"_inmux02_5", std::to_string(
true); int(tile - TILE_DSP0)) +
"_LC0" + std::to_string(lc_idx) +
"_inmux02_5",
true);
}
} }
} }
} }
@ -458,7 +462,7 @@ void write_asc(const Context *ctx, std::ostream &out)
} }
// Write symbols // Write symbols
//const bool write_symbols = 1; // const bool write_symbols = 1;
for (auto wire : ctx->getWires()) { for (auto wire : ctx->getWires()) {
IdString net = ctx->getWireNet(wire, false); IdString net = ctx->getWireNet(wire, false);
if (net != IdString()) if (net != IdString())