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Merge pull request #643 from litghost/id_constants

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[FPGA interchange] Convert some string constants to IdString.
This commit is contained in:
gatecat 2021-03-23 17:33:40 +00:00 committed by GitHub
commit 323da87dec
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2 changed files with 27 additions and 4 deletions
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29
fpga_interchange/arch.cc
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@ -131,6 +131,9 @@ Arch::Arch(ArchArgs args) : args(args)
IdString::initialize_add(this, constids[i].get(), i + 1);
}
id_GND = id("GND");
id_VCC = id("VCC");
// Sanity check cell name ids.
const CellMapPOD &cell_map = *chip_info->cell_map;
int32_t first_cell_id = cell_map.cell_names[0];
@ -1047,7 +1050,7 @@ void Arch::map_cell_pins(CellInfo *cell, int32_t mapping, bool bind_constants)
continue;
}
if (cell_pin.str(this) == "GND") {
if (cell_pin == id_GND) {
if (bind_constants) {
PortInfo port_info;
port_info.name = bel_pin;
@ -1069,7 +1072,7 @@ void Arch::map_cell_pins(CellInfo *cell, int32_t mapping, bool bind_constants)
continue;
}
if (cell_pin.str(this) == "VCC") {
if (cell_pin == id_VCC) {
if (bind_constants) {
PortInfo port_info;
port_info.name = bel_pin;
@ -1107,16 +1110,23 @@ void Arch::map_cell_pins(CellInfo *cell, int32_t mapping, bool bind_constants)
continue;
}
#ifdef DEBUG_CELL_PIN_MAPPING
log_info("parameter match on param_key %s\n", param_key.c_str(this));
#endif
for (const auto &pin_map : parameter_pin_map.pins) {
IdString cell_pin(pin_map.cell_pin);
IdString bel_pin(pin_map.bel_pin);
#ifdef DEBUG_CELL_PIN_MAPPING
log_info(" %s => %s\n", cell_pin.c_str(this), bel_pin.c_str(this));
#endif
// Skip assigned LUT pins, as they are already mapped!
if (cell->lut_cell.lut_pins.count(cell_pin) && cell->cell_bel_pins.count(cell_pin)) {
continue;
}
if (cell_pin.str(this) == "GND") {
if (cell_pin == id_GND) {
if (bind_constants) {
PortInfo port_info;
port_info.name = bel_pin;
@ -1138,7 +1148,7 @@ void Arch::map_cell_pins(CellInfo *cell, int32_t mapping, bool bind_constants)
continue;
}
if (cell_pin.str(this) == "VCC") {
if (cell_pin == id_VCC) {
if (bind_constants) {
PortInfo port_info;
port_info.name = bel_pin;
@ -1163,6 +1173,17 @@ void Arch::map_cell_pins(CellInfo *cell, int32_t mapping, bool bind_constants)
cell->cell_bel_pins[cell_pin].push_back(bel_pin);
}
}
#ifdef DEBUG_CELL_PIN_MAPPING
log_info("Pin mapping for cell %s (type: %s)\n", cell->name.c_str(getCtx()), cell->type.c_str(getCtx()));
for (auto &pin_pair : cell->cell_bel_pins) {
log_info(" %s =>", pin_pair.first.c_str(getCtx()));
for (IdString bel_pin : pin_pair.second) {
log(" %s", bel_pin.c_str(getCtx()));
}
log("\n");
}
#endif
}
void Arch::map_port_pins(BelId bel, CellInfo *cell) const

2
fpga_interchange/arch.h
View File

@ -1049,6 +1049,8 @@ struct Arch : ArchAPI<ArchRanges>
void read_lut_equation(DynamicBitarray<> *equation, const Property &equation_parameter) const;
bool route_vcc_to_unused_lut_pins();
IdString id_GND;
IdString id_VCC;
Lookahead lookahead;
mutable RouteNodeStorage node_storage;
mutable SiteRoutingCache site_routing_cache;