ecp5: Bitsream gen tuning
Signed-off-by: David Shah <davey1576@gmail.com>
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5a7e7b2d03
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@ -191,7 +191,10 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex
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CellInfo *ci = cell.second.get();
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if (ci->bel != BelId() && ci->type == ctx->id("TRELLIS_IO")) {
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int bank = ctx->getPioBelBank(ci->bel);
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std::string dir = str_or_default(ci->params, ctx->id("DIR"), "INPUT");
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std::string iotype = str_or_default(ci->attrs, ctx->id("IO_TYPE"), "LVCMOS33");
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if (dir != "INPUT") {
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IOVoltage vcc = get_vccio(ioType_from_str(iotype));
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if (bankVcc.find(bank) != bankVcc.end()) {
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// TODO: strong and weak constraints
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@ -203,6 +206,8 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex
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} else {
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bankVcc[bank] = vcc;
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}
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}
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if (iotype == "LVDS")
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bankLvds[bank] = true;
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}
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@ -275,8 +280,8 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex
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other = "PIOD";
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else
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log_error("cannot place differential IO at location %s\n", pio.c_str());
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cc.tiles[pio_tile].add_enum(other + ".BASE_TYPE", "_NONE_");
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cc.tiles[pic_tile].add_enum(other + ".BASE_TYPE", "_NONE_");
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//cc.tiles[pio_tile].add_enum(other + ".BASE_TYPE", "_NONE_");
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//cc.tiles[pic_tile].add_enum(other + ".BASE_TYPE", "_NONE_");
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cc.tiles[pio_tile].add_enum(other + ".PULLMODE", "NONE");
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cc.tiles[pio_tile].add_enum(pio + ".PULLMODE", "NONE");
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}
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