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interchange: Cope with undriven nets in more places

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Signed-off-by: gatecat <gatecat@ds0.me>
This commit is contained in:
gatecat 2021-06-14 10:58:42 +01:00
parent ee65e6f32d
commit 377f56c151
3 changed files with 9 additions and 5 deletions
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5
fpga_interchange/dedicated_interconnect.cc
View File

@ -356,13 +356,10 @@ bool DedicatedInterconnect::isBelLocationValid(BelId bel, const CellInfo *cell)
for (const auto &port_pair : cell->ports) { for (const auto &port_pair : cell->ports) {
IdString port_name = port_pair.first; IdString port_name = port_pair.first;
NetInfo *net = port_pair.second.net; NetInfo *net = port_pair.second.net;
if (net == nullptr) { if (net == nullptr || net->driver.cell == nullptr) {
continue; continue;
} }
// This net doesn't have a driver, probably not valid?
NPNR_ASSERT(net->driver.cell != nullptr);
// Only check sink BELs. // Only check sink BELs.
if (net->driver.cell == cell && net->driver.port == port_name) { if (net->driver.cell == cell && net->driver.port == port_name) {
if (!is_driver_on_net_valid(bel, cell, port_name, net)) { if (!is_driver_on_net_valid(bel, cell, port_name, net)) {

5
fpga_interchange/site_arch.cc
View File

@ -154,7 +154,8 @@ SiteArch::SiteArch(const SiteInformation *site_info) : ctx(site_info->ctx), site
SiteNetInfo &net_info = net_pair.second; SiteNetInfo &net_info = net_pair.second;
// All nets require drivers // All nets require drivers
NPNR_ASSERT(net->driver.cell != nullptr); if (net->driver.cell == nullptr)
continue;
bool net_driven_out_of_site = false; bool net_driven_out_of_site = false;
if (net->driver.cell->bel == BelId()) { if (net->driver.cell->bel == BelId()) {
@ -259,6 +260,8 @@ SiteArch::SiteArch(const SiteInformation *site_info) : ctx(site_info->ctx), site
} }
for (auto &net_pair : nets) { for (auto &net_pair : nets) {
if (net_pair.first->driver.cell == nullptr)
continue;
SiteNetInfo *net_info = &net_pair.second; SiteNetInfo *net_info = &net_pair.second;
auto result = wire_to_nets.emplace(net_info->driver, SiteNetMap{net_info, 1}); auto result = wire_to_nets.emplace(net_info->driver, SiteNetMap{net_info, 1});
// By this point, trivial congestion at sources should already by // By this point, trivial congestion at sources should already by

4
fpga_interchange/site_router.cc
View File

@ -706,6 +706,8 @@ static bool route_site(SiteArch *ctx, SiteRoutingCache *site_routing_cache, Rout
expansions.reserve(ctx->nets.size()); expansions.reserve(ctx->nets.size());
for (auto &net_pair : ctx->nets) { for (auto &net_pair : ctx->nets) {
if (net_pair.first->driver.cell == nullptr)
continue;
SiteNetInfo *net = &net_pair.second; SiteNetInfo *net = &net_pair.second;
if (net->net->loop == nullptr) { if (net->net->loop == nullptr) {
@ -792,6 +794,8 @@ void check_routing(const SiteArch &site_arch)
{ {
for (auto &net_pair : site_arch.nets) { for (auto &net_pair : site_arch.nets) {
const NetInfo *net = net_pair.first; const NetInfo *net = net_pair.first;
if (net->driver.cell == nullptr)
continue;
const SiteNetInfo &net_info = net_pair.second; const SiteNetInfo &net_info = net_pair.second;
for (const auto &user : net_info.users) { for (const auto &user : net_info.users) {