nexus: Disable center DCC-thrus on 17k device
Signed-off-by: gatecat <gatecat@ds0.me>
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84fc2877c6
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3d528adfdc
@ -171,6 +171,19 @@ Arch::Arch(ArchArgs args) : args(args)
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BaseArch::init_cell_types();
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BaseArch::init_bel_buckets();
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if (device == "LIFCL-17") {
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for (BelId bel : getBelsByTile(37, 10)) {
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// These pips currently don't work, due to routing differences between the variants that the DB format needs
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// some tweaks to accomodate properly
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if (getBelType(bel) != id_DCC)
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continue;
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WireId w = getBelPinWire(bel, id_CLKI);
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for (auto pip : getPipsUphill(w))
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disabled_pips.insert(pip);
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}
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NPNR_ASSERT(disabled_pips.size() == 4);
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}
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}
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// -----------------------------------------------------------------------
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16
nexus/arch.h
16
nexus/arch.h
@ -918,6 +918,8 @@ struct Arch : BaseArch<ArchRanges>
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// inverse of the above for name->object mapping
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dict<IdString, int> id_to_x, id_to_y;
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pool<PipId> disabled_pips;
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// -------------------------------------------------
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std::string getChipName() const override;
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@ -976,6 +978,20 @@ struct Arch : BaseArch<ArchRanges>
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return tileStatus[bel.tile].boundcells[bel.index] == nullptr;
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}
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bool checkPipAvail(PipId pip) const override
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{
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if (disabled_pips.count(pip))
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return false;
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return BaseArch::checkPipAvail(pip);
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}
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bool checkPipAvailForNet(PipId pip, NetInfo *net) const override
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{
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if (disabled_pips.count(pip))
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return false;
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return BaseArch::checkPipAvailForNet(pip, net);
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}
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CellInfo *getBoundBelCell(BelId bel) const override
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{
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NPNR_ASSERT(bel != BelId());
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@ -312,7 +312,6 @@ struct NexusFasmWriter
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}
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}
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NPNR_ASSERT(found);
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}
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}
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